Memory Controller Sub-Erase Wear Leveling

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing and maintaining the operational status of memory blocks in nonvolatile memory devices, particularly in accurately tracking erase counts and optimizing performance through wear leveling and garbage collection.

Innovation Solution

A method and apparatus that perform sub erase operations on memory blocks, varying the erase count based on the number of sub erase operations and time intervals, allowing for precise tracking of erase counts and optimizing block usage through the selection of blocks with lower erase counts for programming operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If sub erase operations are performed on memory blocks, then erase count tracking precision is improved, but operational complexity increases

Engineering Contradiction:
Improveerase count tracking precisionVSAvoidoperational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The erase operation is segmented into multiple sub-erase operations, where each sub-erase operation erases a portion of the memory block. The controller tracks the number of sub-erase operations performed on each block and uses this information to calculate a precise erase count, thereby improving measurement precision while managing complexity through structured segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller implements a feedback mechanism that monitors the number of sub-erase operations performed on each memory block and uses this information to dynamically adjust the erase count. This feedback loop ensures accurate tracking of erase counts based on actual operational history, resolving the contradiction between precision and complexity.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If erase count is varied based on number of sub erase operations, then wear leveling accuracy is improved, but processing time increases

Engineering Contradiction:
Improvewear leveling accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The controller performs preliminary tracking of sub-erase operation counts during the erase process itself, rather than conducting separate verification operations. By accumulating the number of sub-erase operations as part of the normal erase workflow, the system improves wear leveling accuracy without adding significant processing time overhead.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple sub erase operations are performed, then data erasing completeness is improved, but energy consumption increases

Engineering Contradiction:
Improvedata erasing completenessVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The controller performs a predetermined number of sub-erase operations to ensure complete data erasure, using this partial action approach to guarantee reliability. By specifying a fixed number of sub-erase operations in advance, the system achieves complete erasure without excessive energy consumption, as the operation count is optimized to meet the reliability requirement without unnecessary additional cycles.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10957411B2Apparatus and method for managing valid data in memory system
Publication Date: 2021.03.23 MIMIRIP LLC
  • US10957411B2 patent drawing
  • US10957411B2 patent drawing
  • US10957411B2 patent drawing

AI summary

A memory system includes a memory device including a plurality of blocks, each capable of storing data, and a controller, coupled with the memory device. The controller can perform at least one sub erase operation on each of the plurality of blocks, and variably increase an erase count of each of the plurality of blocks based on a timing of erasing data of each of the plurality of blocks through the sub erase operation.