Memory Controller Suspend-Resume for Read Latency Control
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Solution Overview
Problem
In memory systems with mixed workloads, particularly those using multi-level cells, the long program time for storing multiple bits per memory element leads to delayed read operations, negatively impacting QoS latency and throughput due to the need for read operations to wait until program operations are completed.
Innovation Solution
Implementing a data transfer interrupt mechanism in the memory controller and device to preempt lower-priority program operations with higher-priority operations by suspending data transfer before completion, allowing immediate execution of read operations and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory system waits for complete data transfer before executing read operations, then data integrity is ensured, but read operation latency increases
Solution Approach 1:
The patent implements dynamic operation prioritization where the memory controller can suspend lower-priority program operations and allocate buffer spaces to higher-priority read operations based on real-time workload conditions. This dynamic resource allocation allows the system to switch between different operational states (programming vs. reading) without compromising data integrity, as the suspend/resume mechanism ensures proper data transfer completion when needed.
Solution Approach 2:
The patent divides the data transfer process into manageable segments using buffer spaces (e.g., R0-R3 buffers). By segmenting the data transfer into multiple buffer allocations, the system can pause program operations at specific buffer boundaries, execute read operations from completed buffers, and resume program operations later. This segmentation enables overlapping of program and read operations while maintaining data integrity through controlled buffer management.
2Reliability
If the memory system executes program operations to completion before read operations, then program operation reliability is improved, but system throughput decreases
Solution Approach 1:
The patent enables continuous useful action by allowing read operations to execute concurrently with program operations through the suspend/resume mechanism. Instead of idle waiting periods where the system completes program operations before reads, the controller can suspend program operations, execute reads from available buffer spaces, and resume program operations. This eliminates idle time and maintains continuous productive work, improving overall system throughput while preserving program operation reliability through proper suspension and resumption protocols.
3Speed
If the memory controller checks for commands frequently during data transfer, then response time to high-priority commands is reduced, but controller processing overhead increases
Solution Approach 1:
The patent implements partial checking where the controller monitors for suspend commands at specific checkpoints during data transfer rather than continuously. The controller checks for incoming commands at defined intervals or at buffer completion points, which provides sufficient responsiveness to high-priority commands while avoiding the excessive processing overhead of constant monitoring. This partial action approach balances response time requirements with controller resource consumption.
Data Source
AI summary
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for management of suspend and resume operations in a memory system are described. An example system includes a memory device and a controller. The controller is configured to: while performing data transfer to the memory device for a first operation corresponding to a first command, check whether a second command is received, wherein performing the data transfer to the memory device comprises performing the data transfer in terms of allocation units (AUs). In response to determining that the second command is received and that data transfer in a current AU is completed, the controller sends a suspend command to the memory device.


