Memory Controller Address Translation Suspension
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Solution Overview
Problem
In memory systems using nonvolatile memory, delayed transmission of information from the controller to the host can lead to degraded I/O performance due to data staying in the controller.
Innovation Solution
The controller suspends the command process for reading data from the nonvolatile memory if address translation information is not obtainable, and resumes the process once the necessary information is obtained, thereby preventing data buildup in the internal buffer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the controller continuously reads data from nonvolatile memory without checking address translation availability, then data reading operation continues, but information stays in the controller buffer and I/O performance degrades
Solution Approach 1:
The controller performs preliminary action by suspending the data reading command process before data is read from nonvolatile memory when address translation information is unavailable. This prevents incomplete or erroneous data from being cached in the controller buffer, ensuring that only properly translatable data accumulates in the buffer, thereby maintaining I/O performance reliability.
Solution Approach 2:
The controller implements feedback by monitoring the availability of address translation information and using this status to control the data reading operation. When address translation information becomes unavailable, the controller receives feedback and suspends the command process; when information becomes available, it resumes processing. This feedback mechanism prevents buffer accumulation of untranslatable data and maintains optimal I/O performance.
2Reliability
If the controller suspends the command process when address translation information is unavailable, then data buildup in internal buffer is prevented, but data reading operation is delayed
Solution Approach 1:
The controller performs preliminary action by suspending the data reading command process before data is read from nonvolatile memory when address translation information is unavailable. This prevents incomplete or erroneous data from being cached in the controller buffer, ensuring that only properly translatable data accumulates in the buffer, thereby maintaining I/O performance reliability.
Solution Approach 2:
The controller dynamically adjusts the command process state based on real-time availability of address translation information. The system transitions between suspended and resumed states as needed, optimizing the balance between preventing buffer buildup and maintaining reading operations. This dynamic control ensures that data reading is delayed only when necessary to maintain I/O performance integrity.
3Speed
If the controller reads data without verifying address translation availability, then reading operation is simple and fast, but unreadable data occupies internal buffers and increases peak data traffic
Solution Approach 1:
The controller performs preliminary action by suspending the data reading command process before data is read from nonvolatile memory when address translation information is unavailable. This prevents incomplete or erroneous data from being cached in the controller buffer, ensuring that only properly translatable data accumulates in the buffer, thereby maintaining I/O performance reliability.
Solution Approach 2:
The controller extracts and removes the conditionality check for address translation availability from the continuous reading operation. By suspending the command process when translation information is unavailable, the system separates valid data reading operations from potentially harmful buffer-occupying operations, ensuring that only properly translatable data enters the internal buffer.
Data Source
AI summary
According to one embodiment, in response to receiving a read command from a host, a controller executes a command process of reading data from a nonvolatile memory. The controller executes an address translation process of translating a virtual address specified in the read command to a physical address for accessing a memory of the host. In the address translation process, the controller transmits an address translation request to the host. In response to receiving from the host a response indicating that obtainment of address translation information fails, the controller suspends the command process until the address translation information is obtained, and after the address translation information is obtained, resumes the command process.


