Memory Controller Switching MLC SLC Modes for Power Loss Protection
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Solution Overview
Problem
Conventional memory systems face challenges in efficiently writing data to nonvolatile memory during power loss, particularly in balancing data retention, processing speed, and power consumption across different modes of operation.
Innovation Solution
A memory system incorporating a nonvolatile NAND flash memory, a volatile RAM, and a capacitor, with a memory controller that switches between Multi-Level Cell (MLC), Single Level Cell (SLC) modes, and a Power Loss Protection (PLP) mode, utilizing a capacitor to store energy for data transfer during power outages, optimizing data retention and power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capacitor with larger capacity is used to ensure data retention during power outages, then data loss prevention is improved, but power consumption and memory cell wear-out increase
Solution Approach 1:
The system performs preliminary data transfer from volatile memory to nonvolatile memory during normal operation before power outage occurs. This proactive approach ensures that critical data is already secured in nonvolatile storage, reducing or eliminating the need for a large capacitor to retain data during power loss events.
Solution Approach 2:
The patent employs multiple writing modes (first mode and second mode) with different parameters for data transfer. By switching between these modes depending on power supply status, the system optimizes the balance between data retention reliability and power consumption, avoiding the need for excessive capacitor capacity.
2Quantity of substance
If data is written to nonvolatile memory in a first mode during normal operation, then storage capacity is utilized efficiently, but data transfer speed may be limited during power loss events
Solution Approach 1:
The system dynamically switches between different writing modes based on power supply conditions. During normal operation, the first writing mode is used for efficient storage capacity utilization. Upon detecting power loss, the system transitions to a second writing mode optimized for faster data transfer using capacitor energy, thereby adapting the data transfer speed to the current operational context.
3Adaptability or versatility
If multiple writing modes are implemented to handle different operational scenarios, then adaptability is improved, but device complexity increases
Solution Approach 1:
The memory controller is designed with multi-functionality to handle both normal operation data transfer and power loss protection data transfer through different writing modes. This universal design allows a single controller to adapt to various operational scenarios without requiring separate dedicated circuits for each function, thereby managing complexity while maintaining versatility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively prevents data loss during power outages by using a smaller capacity capacitor, reducing power consumption and wear-out of memory cells, while maintaining data integrity and increasing storage capacity through efficient data writing and error correction.
Implementation Method 1
a capacitor (14) configured to accumulate electric power
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile first memory, a volatile second memory, a capacitor, and a memory controller. The nonvolatile first memory includes a storage region that includes a plurality of memory cells. The capacitor is configured to accumulate electric power. The memory controller writes first data stored in the volatile second memory to the storage region in a first mode, using a power supply from outside. The first mode is a mode in which one-bit data is written to each of the memory cells. The memory controller writes, upon stop of the power supply from the outside, the first data to the storage region in a second mode, using the electric power accumulated in the capacitor. The second mode is a mode in which one-bit data is written to each of the memory cells and is different from the first mode.