Memory Controller Test Data Caching via Register Copy-Back
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Solution Overview
Problem
Existing memory testing methods are delayed due to the need to repeatedly send test data from the controller to the memory, causing a long data transmission period that slows down the entire memory test process.
Innovation Solution
The method involves writing test data to a memory space, then using a read-back command to read it into a data register, and subsequently using a copy-back command to write it to a new address without resending the test data, thereby reducing the need for repeated data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller repeatedly sends test data from the controller to the memory for each write operation, then the memory can be thoroughly tested, but the data transmission period becomes very long causing delay
Solution Approach 1:
The controller first writes test data to a first address in the memory, then reads this test data back into a data register before performing subsequent write operations. This preliminary action of caching test data in the data register eliminates the need to repeatedly transmit test data from the controller for each write operation, significantly reducing data transmission time while maintaining testing accuracy
Solution Approach 2:
The data register acts as an intermediary between the controller and the memory. Instead of directly transmitting test data from the controller to each memory location, the data register serves as a buffer that stores test data after the first write operation, allowing subsequent write operations to use the cached data without repeated transmissions
2Productivity
If the controller sends test data to the memory for each write operation in the test range, then all memory cells can be tested, but the entire memory test process is slowed down
Solution Approach 1:
The controller performs a preliminary write operation to store test data in the memory, then reads this data into the data register. This preliminary action prepares the test data in advance, allowing the controller to subsequently write the same test data to multiple different addresses without repeating the data transmission process, thereby significantly increasing memory testing speed
Solution Approach 2:
Once the test data is loaded into the data register, the controller can continuously perform write operations to different memory addresses using the same cached test data without interruption for data retransmission. This creates a continuous useful action pattern where only the address changes, not the data transmission, maintaining high testing productivity throughout the process
Data Source
AI summary
The invention provides a method for writing test data to a memory. In one embodiment, the memory comprises a data register. First, test data is written to a memory space of the memory. A read-back command and a read-back address of the memory space are then sent to the memory to direct the memory to read the test data from the memory space to the data register. A copy-back command and a copy-back command in a test range of the memory are then sent to the memory to direct the memory to write the test data stored in the data register to the copy-back address. Finally, when the test range of the memory has not been filled with the test data, the step of sending the read-back command and the read-back address is repeated, and the step of sending the copy-back command and the copy-back address is repeated.