Memory Controller Test Firmware Execution
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Solution Overview
Problem
The existing technologies for evaluating nonvolatile memory characteristics, such as flash memory, require CPU-dependent test firmware development, leading to increased costs and complexity due to the need for custom programming for each microcontroller unit (MCU) with a nonvolatile memory module.
Innovation Solution
A semiconductor device configuration that includes a main processor, a rewritable nonvolatile memory, and a memory controller, where the memory controller executes test firmware independently of the CPU, allowing for CPU-independent test firmware development and easier programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CPU-dependent test firmware is used to evaluate nonvolatile memory characteristics, then the test can be performed using existing CPU infrastructure, but the development cost and complexity increase due to the need for custom programming for each MCU
Solution Approach 1:
The patent extracts the test firmware execution function from the CPU and relocates it to the memory controller. This separation allows the memory controller to independently execute test programs for nonvolatile memory evaluation without requiring CPU involvement, thereby reducing the complexity of CPU-dependent programming while maintaining reliable test evaluation capabilities.
Solution Approach 2:
The memory controller is enabled to self-execute test firmware for evaluating its own nonvolatile memory characteristics. This self-service capability eliminates the need for external CPU programming and custom test firmware development for each MCU platform, significantly reducing development costs and complexity while ensuring consistent and reliable memory evaluation.
2Adaptability or versatility
If CPU-dependent test firmware is developed for each MCU with nonvolatile memory module, then the test can be tailored to specific CPU architectures, but the development costs increase due to repeated custom programming
Solution Approach 1:
The patent creates a universal test firmware that can be executed by the memory controller across different MCU platforms without requiring CPU-specific customization. This universal test program eliminates the need for repeated custom programming for each MCU variant, significantly reducing development costs while maintaining adaptability to evaluate nonvolatile memory characteristics on different platforms.
Solution Approach 2:
By extracting the test execution function from the CPU and placing it in the memory controller, the patent enables a single universal test firmware to work across multiple MCU architectures. This eliminates the need for CPU-dependent test programming for each MCU, thereby reducing development costs while preserving the ability to tailor tests to specific memory characteristics.
3Ease of manufacture
If the memory controller executes test firmware independently of the CPU, then the test firmware development is simplified and costs are reduced, but the memory controller must have additional execution capabilities
Solution Approach 1:
The patent enhances the memory controller with multi-functionality by enabling it to execute not only its normal memory control operations but also universal test firmware for evaluating nonvolatile memory characteristics. This universal execution capability simplifies test firmware development and reduces costs while adding only moderate complexity to the memory controller's functionality.
Solution Approach 2:
The patent introduces a test program storage unit within the memory controller that serves as an intermediary for storing and executing test firmware. This intermediary structure allows the memory controller to independently execute tests without requiring complex CPU integration or external programming interfaces, thereby simplifying development while adding manageable complexity to the controller architecture.
Data Source
AI summary
In semiconductor devices with nonvolatile memory modules embedded therein, a technology is provided which facilitates evaluation of the nonvolatile memory characteristics. An MCU includes a CPU, a flash memory, and an FPCC that controls write or erase operations to the flash memory. The FPCC executes a program used to perform write or other operations to the flash memory, thereby performing write or other operations to the flash memory in accordance with a command issued by the CPU. In the MCU, the FCU is configured to execute test firmware to evaluate the flash memory. In addition, a RAM can be used by both the CPU and FCU.