Multi-Chip Memory Controller Test Mode Signal Mapping
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Solution Overview
Problem
Multi-chip memory packages face challenges during testing due to the inability to access the internal functioning of memory devices directly through external inputs and outputs, complicating both manufacturing process testing and defect identification in returned packages.
Innovation Solution
A test mode is implemented in the memory controller that maps external signal lines to specific memory devices, allowing for restricted communication between the processor and other memory devices, enabling direct access and testing of individual memory devices within the package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If external inputs and outputs are used for testing multi-chip memory packages, then the package can be tested through standard interfaces, but internal functioning of memory devices cannot be accessed directly
Solution Approach 1:
The patent divides the multi-chip memory package into individually addressable segments (memory devices) by implementing a test mode in the memory controller that maps external signal lines to specific memory devices. This segmentation allows the testing system to access and test each memory device independently through the shared external interfaces, resolving the contradiction between using standard interfaces and accessing internal functioning.
2Productivity
If all memory devices communicate through shared external signal lines, then the package operates as an integrated system, but individual memory device testing becomes complex
Solution Approach 1:
The patent implements a dynamic test mode in the memory controller that can switch between normal operation mode and testing mode. In testing mode, the controller dynamically maps external signal lines to specific memory devices and prevents communication between external signal lines and other memory devices. This dynamic reconfiguration allows individual memory device testing without permanently altering the integrated system operation, thus reducing testing complexity while maintaining package operation efficiency.
Data Source
AI summary
When a test mode of a controller of a multi-chip integrated circuit package is activated, external signal lines coupled to the controller are re-mapped to signal lines of one of the integrated circuit devices of the multi-chip integrated circuit package to permit direct testing of the integrated circuit device.