Nonvolatile Memory Controller Physical Erasure Timetable

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Solution Overview

Problem

Flash memory-based storage devices retain user data even after it is thought to be erased, leading to security issues due to the 'erase-after-write' characteristic and the lack of actual data deletion, which compromises user data security.

Innovation Solution

A nonvolatile memory system with a memory controller that manages data reception times and physically erases memory blocks based on a block timetable, allowing for secure erasure of data received before, after, or within specific time periods, thereby ensuring data security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If flash memory uses logical erasure through mapping table updates, then write operation efficiency is improved, but data security deteriorates because actual data remains in storage devices

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoiddata security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs physical erasure of memory blocks before they are needed for new data storage. By maintaining a timetable that tracks when data was written and proactively erasing blocks based on time criteria, the system ensures data is physically removed before potential security breaches, resolving the contradiction between efficient writing and secure erasure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the erasure parameter from logical (mapping table updates) to physical (actual data removal). By introducing time-based criteria and tracking write operations, the system transforms the erasure mechanism into a physical process that actually removes data, thereby improving security while maintaining productivity through automated time-based erasure scheduling

Inventive Principle:
Principle #35Parameter changes

2Reliability

If physical erasure is performed on all memory blocks, then data security is improved, but device complexity and time consumption increase

Engineering Contradiction:
Improvedata securityVSAvoiderasure management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of uniformly erasing all memory blocks, the system applies selective erasure based on local characteristics - specifically, the timetable information stored in each block. Blocks are only erased when their recorded write time indicates they contain data older than the retention policy threshold, thereby reducing unnecessary erasure operations and managing complexity through localized, condition-based actions

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The memory blocks themselves carry their own metadata (timetable information) that enables the erasure decision-making process. The blocks essentially manage their own erasure eligibility by maintaining records of their write times, reducing the need for external monitoring and management systems, thus lowering overall device complexity while maintaining security

Inventive Principle:
Principle #25Self-service

3Productivity

If data retention policy is extended, then productivity is improved, but data security risk increases due to longer data persistence

Engineering Contradiction:
Improvedata accessibilityVSAvoiddata security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system continuously monitors the timetable information in memory blocks and uses this feedback to automatically trigger physical erasure when blocks meet the retention policy criteria. This feedback mechanism ensures that data accessibility is maintained within policy limits while automatically eliminating security risks, resolving the contradiction between extended retention for productivity and timely erasure for security

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9760308B2Nonvolatile memory system and operation method of the same
Publication Date: 2017.09.12 SAMSUNG ELECTRONICS CO LTD
  • US9760308B2 patent drawing
  • US9760308B2 patent drawing
  • US9760308B2 patent drawing

AI summary

A nonvolatile memory system comprises a nonvolatile memory device including a plurality of memory blocks. The nonvolatile memory system includes a memory controller, which can control the nonvolatile memory device, and manage start and end reception times of data of each of the memory blocks. The memory controller can cause at least one of the memory blocks to be physically erased based on the managed start and end reception times. A data eliminating unit can physically erase one or more target blocks from among the memory blocks based on a block timetable in response to a data elimination command having a reference time received from a host. An operation method of a nonvolatile memory system can include selecting one or more target blocks for physical erasure in response to the data elimination command, and physically erasing the selected target blocks.