Memory Controller Power Mode Switching

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Solution Overview

Problem

Current memory systems, such as SSDs, face challenges in controlling power consumption efficiently, particularly during data transmission and transcription processes, which can lead to increased energy usage and reduced battery life in portable devices.

Innovation Solution

A memory system with a controller that receives power consumption instructions from a host device, allowing it to switch between normal and power-limited modes, reducing processing frequency and execution thresholds for transcription processes to minimize power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller executes transcription processes frequently to maintain data integrity and optimize storage, then storage reliability is improved, but power consumption increases

Engineering Contradiction:
Improvestorage reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The controller dynamically adjusts the transcription process execution frequency based on the power consumption mode. In power-limited mode, the controller reduces the frequency of transcription processes compared to normal mode, allowing the system to adapt its operation to available power resources while maintaining essential storage functionality.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by switching between normal mode and power-limited mode. When power-limited mode is detected, the controller modifies transcription process parameters such as execution frequency and thresholds, thereby reducing power consumption while maintaining adequate storage reliability for the given power constraints.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the controller reduces transcription process frequency to save power, then power consumption is reduced, but data integrity maintenance slows down

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity maintenance speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

In power-limited mode, the controller performs partial transcription actions by raising the determination thresholds. Instead of executing transcription processes at the original frequency, the controller only initiates transcription when power consumption exceeds higher thresholds or when data integrity issues are more critical, thereby performing just enough action to maintain adequacy under power constraints.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The controller continuously monitors power consumption levels and adjusts transcription process execution based on feedback from power management instructions. When power consumption is within acceptable limits, transcription processes execute at normal frequency; when power consumption exceeds thresholds, the controller reduces transcription frequency, creating a feedback loop that balances data integrity maintenance with power consumption.

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If the controller raises power consumption thresholds for transcription processes, then power consumption is reduced, but transcription execution becomes less responsive

Engineering Contradiction:
Improvepower consumptionVSAvoidtranscription responsiveness
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The determination thresholds for transcription processes are dynamically adjusted based on the operational mode. In power-limited mode, higher thresholds are set to reduce transcription execution frequency and power consumption. When transitioning back to normal mode, the thresholds are reduced again, restoring responsive transcription execution. This dynamic adjustment allows the system to balance responsiveness with power conservation based on current power availability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12086426B2Memory system, information processing system, and host device
Publication Date: 2024.09.10 KIOXIA CORP
  • US12086426B2 patent drawing
  • US12086426B2 patent drawing
  • US12086426B2 patent drawing

AI summary

A memory system may be connected to a host device. The memory system includes a nonvolatile memory and a controller configured to control the nonvolatile memory to reduce an amount of power consumption of the memory system based on a first instruction received from a host device connected to the memory system.