Memory Controller Virtual Block Address Mapping

The patent introduces a memory controller as an intermediary between applications and logical blocks. The memory controller receives access commands from applications, verifies whether the target logical block belongs to the application's authorized area, and either permits or blocks the access. This intermediary mechanism maintains data security while preserving simple application operation, as applications continue to issue access commands without needing to understand the security verification process.

The patent segments the logical block address space into multiple authorized areas, each assigned to specific applications. The memory controller maintains mapping information that divides logical blocks into distinct regions (e.g., first logical block address area for first application, second logical block address area for second application). This segmentation allows applications to access their designated areas directly while preventing access to other areas, thus maintaining both operational simplicity and data security.

The patent extracts the security verification function from the application layer and places it in the memory controller. The memory controller separately maintains mapping information that records which logical block areas belong to which applications. This extraction centralizes the complexity in the memory controller while keeping applications simple, as they only need to issue access commands without implementing their own security verification logic.

The patent performs preliminary configuration of virtual block addresses and their mapping to logical block addresses before applications access data. The memory controller pre-establishes the mapping relationships and authorized areas for each application. When applications issue access commands, the memory controller simply verifies whether the target address falls within the pre-configured authorized area, rather than performing complex real-time security checks.