Memory Controller Virtual Block Address Mapping for Data Update Completeness

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Solution Overview

Problem

Conventional data writing methods for rewritable non-volatile memory modules often result in incomplete updates of file data scattered across logical blocks due to program failures, where only parts of the data are updated while others remain unchanged.

Innovation Solution

A data writing method that configures virtual block addresses to map to logical blocks, allowing the memory controller to determine if a program failure has occurred during data writing and remap virtual block addresses to ensure complete data updates by writing to alternative physical blocks when no failure is detected.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If file data is scattered into a plurality of logical blocks for storage, then storage capacity and flexibility are improved, but program failure may cause incomplete data updates where only parts of the data are updated while other parts remain unchanged

Engineering Contradiction:
Improvestorage flexibilityVSAvoiddata update completeness
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary actions by creating a mapping table that records the correspondence between virtual block addresses and logical block addresses before data writing. This preliminary mapping structure enables the system to track and manage data distribution across multiple logical blocks, facilitating complete data updates even when data is scattered across multiple blocks.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms by checking the mapping table during and after data writing operations to verify whether all logical blocks have been successfully updated. This feedback loop ensures data update completeness by detecting and handling program failures that may leave some logical blocks unchanged, thereby resolving the reliability issue while maintaining storage flexibility.

Inventive Principle:
Principle #23Feedback

2Reliability

If virtual block addresses are configured to map to logical blocks, then data update completeness is improved through failure detection and remapping, but device complexity increases due to additional mapping layers

Engineering Contradiction:
Improvedata update completenessVSAvoidmapping structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system segments the address space into multiple hierarchical layers: virtual block addresses for host interaction, logical block addresses for data management, and physical block addresses for storage operations. This segmentation allows the complex mapping functionality to be divided into manageable components, where each layer handles specific tasks, reducing the perceived complexity while maintaining reliability through systematic failure detection and remapping.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mapping table serves as an intermediary structure between virtual block addresses and logical block addresses. This intermediary enables the system to detect program failures and perform remapping operations without requiring complex direct management between host addresses and storage blocks. The mapping table abstracts the complexity, providing a simple interface for failure detection and recovery while maintaining data update completeness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8812776B2Data writing method, and memory controller and memory storage device using the same
Publication Date: 2014.08.19 PHISON ELECTRONICS
  • US8812776B2 patent drawing
  • US8812776B2 patent drawing
  • US8812776B2 patent drawing

AI summary

A data writing method for a rewritable non-volatile memory module containing physical blocks is provided. The method includes: configuring virtual block address to map to at least a part of the logical blocks; receiving a write command which instructs to write file data to the first virtual block addresses, and the first virtual block addresses are mapped to first logical blocks of the at least the part of the logical blocks. The method further includes: writing the file data into the physical blocks mapped to a plurality of second logical blocks; determining whether a program failure is occurred during the writing period; and if the program failure is not occurred, the first virtual block addresses are remapped to the second logical block. Accordingly, the method can ensure the update completeness of the file data.