Memory Controller Single Volatile Memory Buffer Work Area
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Solution Overview
Problem
Conventional memory systems require multiple internal memories to store data in non-volatile memory and update address correspondence tables, leading to increased costs and power consumption.
Innovation Solution
A memory controller that uses a single volatile memory as both a write buffer and a work area to temporarily store data and update the logical/physical conversion table, reducing the number of memories needed from two to one.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple internal memories are used to store data and update address tables, then data storage and table update functions are achieved, but device complexity and cost increase
Solution Approach 1:
The patent merges the write buffer function and work area function into a single internal memory device. The controller uses one internal memory to perform both data temporary storage (write buffer) and address table update operations (work area), eliminating the need for separate memory devices for each function. This reduces device complexity while maintaining the reliability of data storage and table update operations.
Solution Approach 2:
The single internal memory is designed to serve multiple purposes: it acts as a write buffer for incoming data, a work area for processing address correspondence tables, and a temporary storage for both data and control information. This multi-functional design reduces the overall number of memory components needed in the system.
2Reliability
If multiple internal memories are used for data storage and table updates, then complete memory functions are provided, but power consumption increases
Solution Approach 1:
By combining multiple memory functions into a single internal memory device, the patent reduces the total power consumption associated with multiple independent memory devices. The single memory shares power resources and reduces redundant power management overhead, while still providing complete memory functions including data storage, address table updates, and control operations.
3Device complexity
If a single volatile memory is used for both write buffer and work area, then device complexity and cost are reduced, but memory resource contention may occur
Solution Approach 1:
The patent segments the single internal memory into different operational regions or time slots for write buffer operations and work area operations. By dividing the memory usage into distinct segments, the controller可以避免 resource contention while maintaining the benefits of a single memory device. This segmentation allows efficient data transfer and table updates without compromising productivity.
Data Source
AI summary
According to one embodiment, a memory controller includes a first volatile memory, a second volatile memory, and a controller. The first volatile memory temporarily stores therein data acquired from outside. The controller controls the temporarily stored data to be transferred from the first volatile memory to a non-volatile memory, stores correspondence information of the transferred data to the non-volatile memory in the second volatile memory, and updates correspondence information stored in the non-volatile memory based on the correspondence information stored in the second volatile memory by using the first volatile memory after the data transfer as a work area. The correspondence information represents association between a logical address and a physical address of the data.