Memory Controller Voltage Decay Timing
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Solution Overview
Problem
NAND flash memory devices face issues with determining the deactivation interval and reference time when power is off, as controllers cannot record timing information without additional or external clock circuits, leading to increased costs and standby power consumption.
Innovation Solution
A memory control device and method that selects a memory block, programs data, reads the voltage distribution to determine the deactivation interval, and calculates the reference time without additional or external circuits, using the voltage distribution of the selected memory block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional RTC circuit or external clock circuit is integrated to record timing information, then the deactivation interval can be obtained, but cost and standby power consumption increase
Solution Approach 1:
The patent combines the timing measurement function with the existing memory block structure by utilizing the voltage distribution characteristics of memory cells. Instead of adding a separate RTC circuit, the memory block itself serves dual purposes: data storage and time interval measurement through voltage decay analysis.
Solution Approach 2:
The memory block is made multi-functional by enabling it to perform both its primary function of data storage and the secondary function of timing measurement. The same memory cells and voltage distribution mechanisms are used for both data retention and deactivation interval measurement, eliminating the need for dedicated timing circuits.
2Measurement precision
If additional RTC circuit or external clock circuit is integrated to record timing information, then the deactivation interval can be obtained, but device complexity and cost increase
Solution Approach 1:
The patent merges the timing measurement functionality into the existing memory controller and memory block structure. The controller reads voltage distribution from memory blocks and calculates deactivation intervals, eliminating the need for separate RTC or clock circuits and reducing overall device complexity.
Solution Approach 2:
The memory block serves itself by using its own voltage distribution characteristics to provide timing information. The memory structure inherently contains the information needed for time measurement through voltage decay, requiring no external or additional timing circuits.
3Device complexity
If voltage distribution is read to determine deactivation interval, then no additional circuits are needed, but timing information must be derived from voltage characteristics
Solution Approach 1:
The patent changes the measurement parameter from direct time tracking (requiring clock circuits) to voltage distribution analysis. By monitoring how voltage decays in memory cells over time, the system derives timing information from electrical parameter changes rather than mechanical or oscillatory timekeeping mechanisms.
Solution Approach 2:
The patent replaces the mechanical/oscillatory timekeeping mechanism (clock circuits, RTC) with an electrical field-based measurement system. Instead of using oscillators or mechanical counters, the system uses voltage distribution characteristics in the memory's electrical field to determine time intervals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables determination of the deactivation interval and current reference time within the memory control device without additional circuits, ensuring accurate timing information and reducing power consumption and costs.
Implementation Method 1
internal data stored in the memory may be failure if the memory is not powered for a long time
Implementation Method 2
the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval
Data Source
AI summary
A memory control device includes a memory and a controller. The memory includes a plurality of memory blocks. The controller is coupled to the memory and configured to select a first memory block from the memory blocks and program data into the first memory block. When the memory control device is deactivated and re-activated, the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval, and determine a reference time according to the deactivation interval and an initial time, and the voltage distribution of the first memory block correspond to the data.