Memory Controller Dynamic Read Voltage Adjustment
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Solution Overview
Problem
Semiconductor memory devices face challenges in efficiently managing data due to suboptimal read voltage settings, leading to increased error bits and reduced performance.
Innovation Solution
A controller for semiconductor memory devices that includes a processor for reading data based on a main read voltage and candidate voltages, an ECC for decoding data, a counter for error bit counting, and a voltage setting circuit to adjust the read voltage to minimize error bits, optimizing the read voltage for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a predetermined main read voltage is used for reading data, then the read operation can be performed efficiently, but the number of error bits increases due to suboptimal voltage settings
Solution Approach 1:
The patent implements dynamic voltage adjustment by introducing multiple candidate read voltages and selectively switching between them based on error bit counts. The voltage setting circuit dynamically selects the optimal voltage from candidate voltages when error bits exceed a threshold, transforming the static read voltage system into a dynamic one that adapts to actual data reading conditions, thereby resolving the contradiction between reading efficiency and data accuracy.
Solution Approach 2:
The patent changes the voltage parameter by storing multiple candidate read voltages with different voltage values and switching between them based on error detection results. When the error bit count exceeds the threshold, the system changes the read voltage parameter to a more appropriate value from the candidate set, directly addressing the suboptimal voltage setting issue and improving data accuracy without sacrificing reading efficiency.
2Reliability
If multiple candidate read voltages are tested to find the optimal voltage, then the number of error bits decreases, but the read operation time increases
Solution Approach 1:
The patent applies partial action by not testing all possible voltages exhaustively, but rather using a predetermined plurality of candidate voltages that are likely to contain the optimal value. The voltage setting circuit selectively switches to candidate voltages only when error bits exceed the threshold, performing partial voltage testing rather than exhaustive search, thus reducing time loss while maintaining data accuracy.
Solution Approach 2:
The patent implements feedback control by counting error bits during data reading and using this information to trigger voltage switching. The error bit count serves as feedback that determines whether to switch from the main read voltage to a candidate voltage, creating a closed-loop control system that minimizes unnecessary voltage switching and associated time overhead while ensuring data accuracy when needed.
3Productivity
If the main read voltage is adjusted based on error bit counting, then data management efficiency improves, but the device complexity increases
Solution Approach 1:
The patent applies multi-functionality by designing the voltage setting circuit to perform multiple functions: storing multiple candidate voltages, selecting appropriate voltages based on error bit counts, and switching between different voltage modes (main voltage vs. candidate voltages). This single circuit component handles voltage management tasks that would otherwise require separate systems, improving data management efficiency without proportionally increasing device complexity.
Solution Approach 2:
The patent implements self-service through automatic voltage adjustment based on error bit detection. The controller autonomously monitors error bits during data reading and automatically switches between main read voltage and candidate voltages without external intervention. This self-adjusting mechanism improves data management efficiency while minimizing the need for complex external control systems, as the voltage optimization is handled internally by the memory device itself.
Data Source
AI summary
A controller includes a processor suitable for reading target data based on a predetermined main read voltage, and on each of a plurality of candidate read voltages having different voltage values; a memory suitable for storing main coded data and candidate coded data which are obtained by reading the target data; an ECC suitable for decoding the main coded data to generate main decoded data, and decoding each of the candidate coded data to generate candidate decoded data; and a counter suitable for counting the number of error bits corresponding to the main decoded data, and counting each of numbers of error bits corresponding to each of the candidate decoded data; and a voltage setting circuit suitable for setting a candidate read voltage having a minimum number of error bits, among the candidate decoded data, and which is smaller than the number of error bits corresponding to the main decoded data, as the main read voltage.