Memory System Controller Threshold Voltage Management
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Solution Overview
Problem
Existing memory systems face challenges in efficiently managing data storage and retrieval, particularly in maintaining data integrity and storage performance due to variations in memory cell transistor characteristics and the need for effective data erasure and write operations.
Innovation Solution
A memory system with a controller that increases the threshold voltage of memory cell transistors to make data inaccessible, performs a pre-program operation to optimize storage states, and then decreases the voltage to erase and write data, ensuring high data storage performance by maintaining the intended state of memory cell transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in memory cell transistors, then storage capacity is improved, but data accessibility and integrity deteriorate due to unintentional threshold voltage changes
Solution Approach 1:
The controller performs a pre-program operation before the actual write operation to set the memory cell transistors in an optimal initial state. This preliminary action ensures that the threshold voltage is properly established before data storage, preventing unintentional voltage changes that would compromise data integrity.
Solution Approach 2:
The controller dynamically adjusts the threshold voltage of memory cell transistors by controlling programming pulse parameters. By changing voltage parameters and applying specific pulse sequences, the controller maintains reliable data storage while preventing unwanted threshold voltage drift that would affect data accessibility.
2Reliability
If threshold voltage is increased to make data inaccessible, then data security is improved, but storage performance deteriorates due to additional voltage manipulation steps
Solution Approach 1:
The pre-program operation is performed in advance to prepare memory blocks for future write operations. By setting the threshold voltage to an appropriate level beforehand, the system achieves both data security (inaccessibility) and maintains storage performance, as the voltage manipulation is done during a preparatory phase rather than during critical data operations.
Solution Approach 2:
The controller uses controlled parameter changes in the programming pulses to adjust threshold voltage. By precisely managing voltage parameters, the system can increase threshold voltage for security purposes while minimizing the impact on storage performance through optimized pulse sequences and timing.
3Reliability
If pre-program operation is performed to optimize storage states, then data storage reliability is improved, but operation time increases
Solution Approach 1:
The pre-program operation prepares memory blocks in advance by setting threshold voltages to optimal levels. This preliminary action improves storage reliability by ensuring proper initial states, and the time investment is offset by preventing the need for corrective operations later and enabling faster actual write operations.
Solution Approach 2:
The pre-program operation is integrated into the overall memory management workflow, where prepared blocks are ready for immediate write operations. This continuous preparation approach ensures that while individual pre-program operations take time, the overall system maintains high throughput by having pre-prepared blocks available when needed.
Data Source
AI summary
According to one embodiment, a memory system includes: a memory device including a memory cell transistor; and a controller configured to make first data inaccessible from an outside of the memory system without erasing the first data, and increase a threshold voltage of the memory cell transistor, before determining to write data into the memory cell transistor. The controller is further configured to decrease, after determining to write second data into the memory cell transistor, the threshold voltage of the memory cell transistor to bring the memory cell transistor into an erase state; and write, after bringing the memory cell transistor into the erase state, the second data into the memory cell transistor.