Memory Controller Read Voltage Offset Mapping for 3D NAND
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As 3D NAND Flash memory devices store more bits and layers, they experience complex read errors, and existing memory systems struggle to quickly and accurately determine optimal read voltages, leading to decreased read performance and increased error correction times.
Innovation Solution
A memory controller method that determines a memory device's use state and applies a corresponding voltage offset from a preset mapping relationship to obtain suitable read voltages, allowing for accurate read operations without requiring complex DSP engines or read voltage search functions in the memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D NAND Flash memory devices store more bits and layers, then storage capacity is improved, but read error complexity increases
Solution Approach 1:
The patent dynamically adjusts read voltage parameters based on memory device state parameters (erase count, program count, read count, temperatures). By changing voltage parameters according to operational history and environmental conditions, the system optimizes read accuracy for multi-bit cells while managing error complexity through adaptive parameter modification rather than structural changes.
2Measurement precision
If existing memory systems use complex DSP engines or read voltage search functions, then read voltage determination accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extracts the voltage offset determination function from complex DSP engines and implements it through a simplified lookup table (mapping table) that stores pre-calculated voltage offsets corresponding to different memory device states. This extraction eliminates the need for complex real-time computations while maintaining accurate read voltage determination.
Solution Approach 2:
The patent creates a simplified copy of the complex voltage determination process by using a pre-computed mapping table that stores voltage offset values for different state parameter combinations. Instead of executing complex algorithms, the system queries pre-prepared data, effectively copying the functional outcome without the computational complexity.
3Measurement precision
If existing memory systems perform extensive read voltage search, then read voltage accuracy is improved, but error correction time increases
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing voltage offset values in a mapping table during system initialization or idle periods. When a read error occurs, the system immediately queries the pre-prepared table based on current state parameters, eliminating the need for time-consuming real-time voltage search and significantly reducing error correction time while maintaining accuracy.
Data Source
AI summary
Examples of the present application disclose a memory controller, a memory system and an operation method thereof. The operation method includes: determining that a memory device is in a first use state in response to determining that a read error is occurred in the memory device of the memory system; determining a first voltage offset corresponding to the first use state according to a preset mapping relationship that includes a corresponding relationship between a use state of the memory device and a voltage offset, the voltage offset including an offset value relative to a preset reference read voltage; and obtaining at least one first read voltage for performing a read operation on the memory device in the first use state according to the preset reference read voltage and the first voltage offset.