Memory Controller VPC Offset Garbage Collection

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Solution Overview

Problem

Existing memory systems face inefficiencies in data processing and wear leveling, leading to reduced reliability and utilization of memory devices due to uneven erase counts and valid page counts across memory blocks.

Innovation Solution

A memory system and operating method that generate valid page counts (VPCs) and erase counts (ECs) at different time points, selecting source and target memory blocks based on generated offsets to perform garbage collection and wear leveling operations, ensuring efficient data processing and maximizing memory device usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are used without monitoring valid page counts and erase counts, then the memory system operates with simpler control logic, but data processing reliability and memory utilization efficiency deteriorate due to uneven wear and invalid data retention

Engineering Contradiction:
Improvedata processing reliabilityVSAvoidcontrol logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller pre-generates and stores valid page count (VPC) information and erase count (EC) information for each memory block at different time points. This preliminary action enables subsequent garbage collection and wear leveling operations to be performed efficiently by simply comparing pre-stored counts, rather than performing complex real-time analysis, thus improving reliability without proportionally increasing control complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller continuously monitors and compares VPC offsets and EC offsets between different time points to dynamically adjust garbage collection and wear leveling operations. This feedback mechanism ensures that memory blocks are managed based on their actual usage patterns and wear states, improving data processing reliability while maintaining manageable control logic through iterative optimization

Inventive Principle:
Principle #23Feedback

2Reliability

If garbage collection operations are performed on all closed memory blocks, then all invalid data is cleared ensuring data integrity, but processing time and energy consumption increase significantly

Engineering Contradiction:
Improvedata integrityVSAvoidgarbage collection processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Instead of uniformly applying garbage collection to all closed memory blocks, the controller calculates VPC offsets for each block and selectively performs garbage collection only on blocks with VPC offsets below a predetermined threshold. This localized approach clears invalid data where needed while skipping blocks that are already optimized, significantly reducing processing time while maintaining data integrity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The controller uses VPC offset as a dynamic parameter to determine garbage collection priorities. By changing the selection criterion from uniform treatment to offset-based selection, the system identifies and processes only those memory blocks that benefit most from garbage collection, reducing overall processing time while ensuring data integrity for blocks that require it

Inventive Principle:
Principle #35Parameter changes

3Duration of action of stationary object

If wear leveling operations redistribute data across all memory blocks, then erase count uniformity improves extending memory lifespan, but data movement overhead and processing complexity increase

Engineering Contradiction:
Improvememory device lifespanVSAvoiddata redistribution complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The controller calculates EC offsets for each memory block and selectively performs wear leveling operations only on blocks with EC offsets above a predetermined threshold. This localized approach redistributes data only where wear imbalance exists, extending memory lifespan while avoiding unnecessary data movement in already-balanced blocks, thus reducing processing complexity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The controller uses EC offset as a dynamic parameter to guide wear leveling operations. By changing from uniform wear leveling to offset-driven selective wear leveling, the system achieves better erase count uniformity across memory blocks (extending lifespan) while minimizing data movement overhead and operational complexity through intelligent block selection

Inventive Principle:
Principle #35Parameter changes

4Measurement precision

If valid page counts and erase counts are generated and compared at multiple time points, then selection accuracy for garbage collection and wear leveling improves, but measurement and processing overhead increases

Engineering Contradiction:
Improveblock selection accuracyVSAvoidcount generation and comparison time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The controller pre-generates VPC and EC information at different time points and stores it for later comparison. This preliminary generation of count data enables accurate block selection for garbage collection and wear leveling without performing time-consuming real-time measurements during actual operations, thus improving selection accuracy while minimizing processing overhead

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller generates and compares counts at multiple time points, which provides more precision than single-time-point measurement. This excessive measurement approach ensures accurate identification of blocks needing garbage collection or wear leveling, and the overhead is justified by the significant improvement in operation effectiveness and memory management accuracy

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9996277B2Memory system and operating method of memory system
Publication Date: 2018.06.12 SK HYNIX INC
  • US9996277B2 patent drawing
  • US9996277B2 patent drawing
  • US9996277B2 patent drawing

AI summary

This technology relates to a memory system for processing data into a memory device and an operating method of the same. The memory system may include a memory device comprising one or more closed memory blocks each including plural pages, and a controller suitable for generating valid page counts (VPCs) for each closed memory block at least two different time points, generating a VPC offset for each closed memory block between the at least two different time points, selecting a source memory block among the closed memory blocks according to the generated VPC offsets, and performing a garbage collection operation to the selected source memory block.