Memory Controller Wear Leveling via Error Bit Running Average

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Solution Overview

Problem

Nonvolatile memory devices face performance degradation due to insufficient buffer area space and increased wear leveling in flash memory systems, leading to frequent data transfers and uneven program/erase cycles, which shortens their lifespan.

Innovation Solution

A memory controller driving method that counts error bits, determines a running average value, and performs wear leveling operations based on this value to uniformly manage program/erase frequencies across memory blocks, using a noise parameter to adjust the frequency of wear leveling operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is stored in a buffer area before user area, then the number of merge operations is reduced, but the buffer area space becomes insufficient when file data size increases

Engineering Contradiction:
Improvemerge operation efficiencyVSAvoidbuffer area space
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent dynamically adjusts the buffer area size based on the actual wear level of memory blocks. When wear levels indicate high utilization, the buffer area is expanded to accommodate larger file data, preventing space insufficiency while maintaining the efficiency benefits of buffered storage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the buffer area parameter (size) based on wear leveling metrics. By monitoring the wear levels of memory blocks and calculating average wear values, the buffer area is resized to optimize both space utilization and merge operation efficiency under different storage conditions.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If file data is frequently transferred between buffer area and user area, then buffer space utilization improves, but system performance is degraded

Engineering Contradiction:
Improvebuffer space utilizationVSAvoidsystem performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent implements a feedback mechanism that monitors wear levels of memory blocks and adjusts buffer area management strategies accordingly. When wear levels indicate that frequent transfers are occurring, the system modifies buffer allocation and transfer policies to reduce unnecessary operations, thereby maintaining performance while optimizing space utilization.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts transfer frequency and buffer management based on real-time wear level monitoring. By making the transfer operation adaptive rather than fixed, the system optimizes the balance between buffer utilization and performance degradation.

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If wear leveling is performed on buffer area, then uniform wear distribution is achieved, but wear level of buffer area is sharply increased compared with user area

Engineering Contradiction:
Improvewear distribution uniformityVSAvoidbuffer area wear level
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent applies different wear leveling strategies to different areas of the memory system. The buffer area and user area are managed with distinct wear leveling policies, where the buffer area receives adjusted wear leveling intensity based on its specific usage patterns and wear characteristics, preventing excessive wear accumulation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes wear leveling parameters specifically for the buffer area based on its wear level relative to the user area. By adjusting wear leveling intensity and frequency as a function of the wear level difference between buffer and user areas, the system achieves uniform wear distribution without causing sharp wear increases in the buffer area.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9594673B2Driving method of memory controller and nonvolatile memory device controlled by memory controller
Publication Date: 2017.03.14 SAMSUNG ELECTRONICS CO LTD
  • US9594673B2 patent drawing
  • US9594673B2 patent drawing
  • US9594673B2 patent drawing

AI summary

A method is for driving a memory controller which is configured to control a nonvolatile memory device. The method includes counting a number of error bits of read data provided from the nonvolatile memory device, determining a running average value using the number of error bits; and performing a wear leveling on the nonvolatile memory device using the running average value as a wear leveling index.