Memory Controller Wear Leveling Probability
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Solution Overview
Problem
Non-volatile memory systems face performance deterioration due to concentrated write operations, leading to uneven wear across memory cells, which can result in data unreadability and reduced system lifespan.
Innovation Solution
A memory controller with a counter circuit to track wear levels and a control circuit that sets thresholds for wear leveling, determining when to perform wear leveling operations based on the number of write operations, thereby spreading data write operations across memory cells to prevent concentration and extend system life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wear leveling is performed frequently to prevent data unreadability, then reliability is improved, but productivity deteriorates due to performance deterioration during write operations
Solution Approach 1:
The patent implements dynamic wear leveling by adjusting the wear leveling probability based on the current wear state of memory blocks. When blocks are heavily worn, wear leveling is performed with higher probability to prevent data unreadability. When blocks are less worn, wear leveling probability is reduced to minimize performance impact. This dynamic adjustment resolves the contradiction by adapting the wear leveling frequency to actual memory conditions.
Solution Approach 2:
The patent changes the parameter of wear leveling probability (from fixed to variable) based on wear information. By maintaining a distribution of wear levels across memory blocks and adjusting the wear leveling probability accordingly, the system optimizes between reliability (preventing data loss) and productivity (maintaining write performance).
2Duration of action of stationary object
If wear leveling is performed to distribute write operations evenly, then duration of action is extended, but productivity decreases due to concentrated write operations during wear leveling
Solution Approach 1:
The patent applies partial wear leveling by performing wear leveling operations with a controlled probability rather than uniformly across all memory blocks. This partial action approach extends memory lifespan by preventing complete wear concentration while minimizing the impact on write throughput by not over-applying wear leveling operations.
Solution Approach 2:
The patent implements periodic wear leveling based on wear thresholds and probability distributions. Instead of continuous wear leveling, the system periodically performs wear leveling operations when wear information indicates it is appropriate, thereby extending memory lifespan while maintaining productivity during non-wear-leveling periods.
3Reliability
If wear leveling probability is increased to prevent performance deterioration, then reliability is improved, but productivity worsens due to more frequent wear leveling operations
Solution Approach 1:
The patent dynamically adjusts wear leveling probability based on real-time wear information from memory blocks. When wear levels indicate high risk of data unreadability, the probability increases to improve reliability. When wear levels are acceptable, the probability decreases to maintain productivity. This dynamic adaptation resolves the contradiction between reliability and productivity.
Solution Approach 2:
The patent uses wear information as feedback to adjust wear leveling probability. The controller continuously monitors wear levels and uses this feedback to optimize the wear leveling strategy, increasing probability when needed for reliability and decreasing it when productivity is prioritized, thereby resolving the contradiction.
Data Source
AI summary
A memory controller connectable to a semiconductor memory including a plurality of memory areas, includes a counter circuit configured to count a degree of wear of each of the memory areas in response to a memory operation addressed thereto, and a control circuit configured to set a rate of for wear leveling to be performed on the plurality of memory areas based on a total number of memory operations performed thereon, and select whether to perform wear leveling on each of the memory areas based on the rate, the degree of wear counted for the memory area, a first threshold for the degree of wear, and a second threshold for the degree of wear. The second threshold is greater than the first threshold.