Memory Controller Wear Leveling via Data Update Count

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Solution Overview

Problem

Existing memory systems face reduced lifespan due to uneven wear distribution across memory blocks, as erase operations are concentrated on certain blocks, leading to premature degradation, which is not effectively addressed by relying solely on erase count for wear leveling.

Innovation Solution

A controller that determines candidate blocks based on erase counts and further selects a victim block based on data update counts, moving data from the victim block to a destination block with higher erase counts to evenly distribute wear across memory blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If wear leveling is performed based solely on erase counts, then the selection process is simple, but the wear distribution remains uneven and lifespan is reduced

Engineering Contradiction:
Improvewear leveling selection processVSAvoidmemory block lifespan
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the selection parameters for wear leveling from solely erase count to a multi-dimensional criterion including erase count, data update count, and read count. This parameter expansion allows the system to select victim blocks more intelligently, avoiding blocks with high data activity that would benefit from frequent rewrites, thereby improving wear distribution and extending memory lifespan.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic adjustment of wear leveling strategies based on real-time monitoring of data update counts and read counts. The system dynamically identifies hot blocks (high update/read activity) and cold blocks (low activity), and adjusts victim block selection accordingly, making the wear leveling process adaptive rather than static.

Inventive Principle:
Principle #15Dynamics

2Reliability

If data is moved frequently to balance wear, then wear distribution improves, but performance degrades due to increased operations

Engineering Contradiction:
Improvewear distribution uniformityVSAvoidmemory system performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by treating different memory blocks differently based on their activity characteristics. Hot blocks (high data update count) are protected from being selected as victim blocks, while cold blocks (low activity) are preferentially selected. This localized differentiation ensures that wear leveling operations are performed only where they are most beneficial, avoiding unnecessary data movements and preserving performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

By introducing data update count and read count as additional parameters beyond erase count, the system can make more informed decisions about which blocks to select as victims. This prevents the selection of blocks that are frequently accessed or updated, thereby reducing the number of unnecessary data movement operations and maintaining higher system performance.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If blocks with low erase counts are selected as victims, then wear leveling is achieved, but high-erase-count blocks continue to degrade prematurely

Engineering Contradiction:
Improveerase count balanceVSAvoidhigh-erase-count block lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent performs preliminary analysis of block characteristics (data update count, read count) before selecting victim blocks. By proactively identifying hot blocks and preventing their selection as victims, the system protects high-erase-count blocks from further premature degradation. This preliminary screening ensures that only appropriate cold blocks are selected, extending the effective lifespan of actively used blocks.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11449418B2Controller and method for selecting victim block for wear leveling operation
Publication Date: 2022.09.20 MIMIRIP LLC
  • US11449418B2 patent drawing
  • US11449418B2 patent drawing
  • US11449418B2 patent drawing

AI summary

A method for operating a controller for controlling a memory device including memory blocks, the method includes: determining candidate blocks based on erase counts of the memory blocks; determining a victim block among the candidate blocks based on data update counts of logical addresses associated with a plurality of pages in each of the candidate blocks; and moving data of the victim block into a destination block.