Memory Controller Write Buffer for Fine-Grained Access

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Solution Overview

Problem

Existing memory systems face performance degradation due to the need for read-modify-write operations when handling fine-grained access, which increases the overhead and degrades system performance.

Innovation Solution

A memory system with a memory controller that includes a host interface, a memory interface, and a write buffer, which temporarily stores data in entries reserved for continuous logical address ranges. The memory controller performs host inquiries to acquire missing data from the host cache, allowing for efficient handling of fine-grained access without executing read operations from the nonvolatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read-modify-write operation is executed for fine-grained access, then data integrity is maintained, but system performance degrades due to increased overhead

Engineering Contradiction:
Improvedata integrityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory controller checks the write buffer for the presence of valid data before executing read-modify-write operations. By performing this preliminary check, the system avoids unnecessary read operations from the nonvolatile memory when data is already available in the write buffer, thereby maintaining data integrity while improving system performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The write buffer serves dual purposes: it acts as both a write cache and a source for read-modify-write operations. When data is already present in the write buffer, the system uses this self-service capability to fulfill read requirements without accessing the nonvolatile memory, thus maintaining reliability while reducing performance overhead

Inventive Principle:
Principle #25Self-service

2Loss of information

If read operation is executed from nonvolatile memory for fine-grained access, then complete data is obtained, but access time increases

Engineering Contradiction:
Improvedata completenessVSAvoidaccess time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

Data is preliminarily stored in the write buffer during write operations. When subsequent read operations are needed for fine-grained access, the controller first checks if the required data is already present in the write buffer. This preliminary storage action eliminates the need for time-consuming read operations from the nonvolatile memory while ensuring data completeness

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The write buffer acts as an intermediary between the host and the nonvolatile memory. For fine-grained access operations, the controller retrieves data from the write buffer intermediary rather than directly from the nonvolatile memory, thereby obtaining complete data while significantly reducing access time

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12223203B2Memory system and control method
Publication Date: 2025.02.11 KIOXIA CORP
  • US12223203B2 patent drawing
  • US12223203B2 patent drawing
  • US12223203B2 patent drawing

AI summary

A memory controller of a memory system includes a host interface, a memory interface, and a write buffer configured to temporarily store data of a second size that is greater than a first size of a sector in each of a plurality of entries. Each of the entries includes a plurality of sectors. The memory controller is configured to select one of the entries in which write data is to be stored, determine whether the selected entry is missing data of any sector, perform a host inquiry by transmitting a request for the missing data, store the missing data in the selected entry, and then perform a write operation to store the data of the selected entry into the nonvolatile memory at a continuous physical address range of the nonvolatile memory.