Memory Controller Write Confirmation During Power Loss

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Solution Overview

Problem

Modern storage devices face inconsistent states due to unexpected power losses, particularly in high-density non-volatile storage like TLC flash, which can lead to failed write operations and resource inefficiencies, as they require re-sending write operations after power restoration.

Innovation Solution

The memory system sends confirmation of a successful write operation before detection from the underlying non-volatile memory, allowing for earlier resource release and data recovery by rewriting to a different type of non-volatile memory upon power loss, thereby minimizing recovery time and avoiding disruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system waits for confirmation from underlying non-volatile memory before sending write confirmation, then data reliability is improved, but resource dedication duration increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidresource dedication duration
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The memory system performs preliminary actions by sending the write confirmation to the host system before the write operation is fully complete in the non-volatile memory. The controller prepares and transmits the confirmation signal in advance, based on preliminary validation that the write is proceeding correctly, rather than waiting for absolute completion. This preliminary action reduces resource dedication duration while maintaining acceptable data reliability through subsequent verification mechanisms.

Inventive Principle:
Principle #10Preliminary action

2Duration of action of moving object

If the memory system sends write confirmation before write completion, then resource dedication duration is reduced, but data reliability deteriorates

Engineering Contradiction:
Improveresource dedication durationVSAvoiddata reliability
Core Design Contradiction:
Duration of action of moving objectVSReliability

Solution Approach 1:

The memory system implements feedback mechanisms where the controller continuously monitors the write operation status and uses this feedback to determine when to send confirmation. The feedback loop includes checking write buffers, validating data integrity, and assessing completion status. This feedback-driven approach allows the system to send confirmation at the optimal moment - early enough to reduce resource dedication duration but only after sufficient validation to maintain data reliability.

Inventive Principle:
Principle #23Feedback

3Quantity of substance

If high-density non-volatile storage is used, then storage capacity is improved, but susceptibility to power loss inconsistency increases

Engineering Contradiction:
Improvestorage capacityVSAvoidconsistency after power loss
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory system applies beforehand cushioning by implementing protective measures before power loss can occur. This includes maintaining write buffers that can hold data temporarily, using error correction codes to detect and correct inconsistencies, and implementing wear-leveling algorithms to distribute write operations evenly. These cushioning mechanisms protect against power loss effects even in high-density storage where calibration time is longer, thereby maintaining consistency after power restoration.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11520487B2Managing write operations during a power loss
Publication Date: 2022.12.06 MICRON TECHNOLOGY INC
  • US11520487B2 patent drawing
  • US11520487B2 patent drawing
  • US11520487B2 patent drawing

AI summary

Exemplary methods, apparatuses, and systems include a memory controller detecting that an asynchronous power loss event has occurred. Upon determining that a write operation is in progress to a first type of non-volatile memory element, the memory controller cancels the write operation and retrieves data associated with the write operation. The memory controller sends a request for a second physical address pointing to a second type of non-volatile memory element. Upon receiving a second physical address corresponding to a logical address, the memory controller stores the data at the second physical address.