Memory Controller Data Integrity Check via Write Enable Pin
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Solution Overview
Problem
Flash storage devices lack mechanisms for data integrity checking during data transfer operations, leading to potential data loss or corruption that goes undetected until read operations, resulting in inefficient error handling and data integrity issues.
Innovation Solution
Repurposing the WEn pin to carry data integrity information during write operations, allowing for real-time error detection and correction by generating and transferring parity or ECC bits alongside data, enabling data integrity checks before data is written to memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transferred during write operations without integrity checking, then transfer speed is maintained, but data reliability deteriorates due to undetected errors
Solution Approach 1:
The patent applies preliminary action by generating data integrity information (such as parity bits or ECC codes) before the actual data transfer during write operations. This allows error detection to be performed proactively during the transfer phase rather than waiting until read operations, thereby improving data reliability without requiring complex post-transfer verification mechanisms.
2Reliability
If data integrity information is transferred alongside data, then error detection capability is improved, but communication bandwidth is reduced
Solution Approach 1:
The patent employs parameter changes by dynamically adjusting the format and amount of data integrity information based on the specific write operation requirements. The controller can select between different error detection schemes (parity bits, ECC codes) and adjust their strength, allowing optimization between reliability and bandwidth usage depending on the application context.
3Loss of time
If errors are detected during read operations instead of write operations, then device complexity is minimized, but loss of time increases due to late error detection
Solution Approach 1:
The patent implements preliminary action by establishing error detection capability during the write operation phase itself. The controller generates and transfers data integrity information alongside the data being written, enabling immediate error detection during transfer rather than waiting until read operations. This reduces time loss by detecting errors at the source while the overhead is managed through efficient use of existing communication channels.
Data Source
AI summary
Aspects of a storage device including a memory and a controller are provided for error detection and data integrity checking during the data transfer of write operations. The memory includes a write enable input. The controller generates data integrity information based on at least one data byte to be written to the memory, and transfers the at least one data byte and the data integrity information to the memory, with the data integrity information being transferred to the write enable input. A data integrity circuit receives the at least one data byte and the data integrity information from the controller, and detects whether an error exists in the at least one data byte based on the data integrity information. Accordingly, error detection of data being written to memory may be improved by the data integrity checking of the data prior to being written to the memory of the storage device.