Memory Controller Dynamic Write Voltage Adjustment
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Solution Overview
Problem
Current memory systems face inefficiencies in writing data to non-volatile memory, particularly in managing initial write voltages, which can lead to increased write times and suboptimal threshold voltage management.
Innovation Solution
A memory system that includes a memory controller capable of determining and transmitting an initial write voltage value based on the total number of write and erase operations performed on memory cells, updating the initial write voltage management table accordingly to optimize write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed initial write voltage is used for all write operations, then the control logic is simple, but the write time increases and threshold voltage management becomes suboptimal
Solution Approach 1:
The patent implements dynamic adjustment of the initial write voltage based on the number of erase operations performed on the memory block. The memory controller dynamically selects from multiple predetermined initial write voltages (first, second, third initial write voltages) corresponding to different erase operation ranges, allowing the write voltage to adapt to the wear state of the memory block and optimize write performance throughout the device lifecycle.
Solution Approach 2:
The patent changes the write voltage parameter based on the erase operation count. By establishing a correspondence between erase operation ranges and specific initial write voltages, the system adjusts the voltage parameter to match the memory block's current state, thereby reducing write time and improving threshold voltage management without excessive complexity.
2Loss of time
If the initial write voltage is adjusted based on the number of erase operations, then the write time is reduced, but the device complexity increases
Solution Approach 1:
The patent pre-establishes multiple predetermined initial write voltages and their corresponding erase operation ranges before actual operation. The memory controller has already prepared the voltage selection strategy, so during write operations, it only needs to query the current erase count and select the appropriate pre-defined voltage, avoiding complex real-time calculations and reducing operational complexity.
Solution Approach 2:
The memory management unit automatically tracks the number of erase operations and autonomously selects the appropriate initial write voltage based on the current erase count. This self-service mechanism eliminates the need for manual intervention or complex external control logic, achieving adaptive voltage management through built-in intelligence.
3Speed
If a high initial write voltage is always applied, then the write speed is fast, but the threshold voltage increases excessively over the device life cycle
Solution Approach 1:
The patent dynamically adjusts the initial write voltage based on the erase operation count to balance write speed and threshold voltage stability. For memory blocks with fewer erase operations, higher initial write voltages are applied to achieve faster write speeds. As the erase count increases and the memory block approaches end-of-life, lower initial write voltages are selected to prevent excessive threshold voltage increase and maintain reliability.
Solution Approach 2:
The system changes the write voltage parameter according to the erase operation range. By establishing different voltage levels for different erase counts, the patent optimizes the trade-off between write speed and threshold voltage stability throughout the device's operational lifecycle, ensuring both performance and reliability.
Data Source
AI summary
A memory system includes a semiconductor storage device including a memory cell array including a plurality of groups of memory cells, and a control circuit configured to perform, upon receipt of a write command, a write operation on one of the groups of memory cells, and a memory controller is configured to, when transmitting the write command to perform the write operation on the one of the groups of memory cells, determine a first write voltage value for the write operation based on a total number of write operations or erase operations that have been performed on the one of the groups of memory cells, and transmit the write command to the semiconductor storage device together with the determined first write voltage value.