Memory Controller Zone Reset Latency and Block Lifespan

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Solution Overview

Problem

Existing memory controllers face challenges in reducing latency for foreground operations and extending the lifespan of memory blocks during zone reset operations, as they typically perform block erase operations immediately, which can delay foreground operations and reduce memory block lifespan.

Innovation Solution

A memory controller that sequentially performs block erase operations on memory blocks within a zone during periods when foreground operations are not active, and only on memory blocks with written data, thereby reducing latency and extending memory block lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If block erase operations are performed immediately during zone reset, then the zone reset operation is completed quickly, but the latency of foreground operations increases and memory block lifespan is reduced

Engineering Contradiction:
Improvezone reset operation speedVSAvoidforeground operation latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The memory controller performs block erase operations periodically during idle periods when no foreground operations are active, rather than immediately during zone reset. This periodic execution allows the system to maintain zone reset productivity while avoiding conflicts with foreground operations, thereby reducing foreground operation latency.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system dynamically adjusts the timing of block erase operations based on the activity state of foreground operations. When foreground operations are detected, block erase operations are postponed; when idle periods occur, block erase operations are executed. This dynamic scheduling resolves the contradiction between zone reset speed and foreground operation latency.

Inventive Principle:
Principle #15Dynamics

2Reliability

If block erase operations are performed on all memory blocks in a zone, then the zone reset is thorough, but memory block lifespan is reduced due to unnecessary erasure operations

Engineering Contradiction:
Improvezone reset completenessVSAvoidmemory block lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

Instead of uniformly erasing all memory blocks in a zone, the system applies local quality by selectively erasing only those memory blocks that contain written data. The memory controller identifies and targets specific memory blocks based on their data status, ensuring thorough zone reset where needed while preserving memory blocks that don't require erasure, thus extending overall memory block lifespan.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs partial action by executing block erase operations only on the necessary subset of memory blocks (those with written data) rather than on the entire zone. This partial erasure approach maintains zone reset reliability for used blocks while avoiding excessive erasure operations on unused blocks, thereby extending memory block lifespan.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250190135A1Memory controller and storage device including the same
Publication Date: 2025.06.12 SAMSUNG ELECTRONICS CO LTD
  • US20250190135A1 patent drawing
  • US20250190135A1 patent drawing
  • US20250190135A1 patent drawing

AI summary

A storage device includes a memory device including memory blocks corresponding to physical zones; and a memory controller connected to the memory device is configured to, when receiving a zone reset command for a reset target zone, update a physical zone corresponding to the reset target zone among the physical zones to an invalid zone in a mapping table, and to trigger a block erase operation for a erase target memory block among memory blocks included in the invalid zone in a period in which a foreground operation corresponding to a foreground command is not performed, and wherein the memory controller is configured to, when receiving an additional foreground command in the period in which the block erase operation is performed on a current memory block, trigger an additional foreground operation corresponding to the additional foreground command after the block erase operation is completed.