Memory Counter Increment Scheme for High-Rate Range Updates

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Solution Overview

Problem

Current measuring devices face high memory access rates due to the need to increment multiple adjacent memory cells in real-time, which exceeds the resolution and sampling rate capabilities of contemporary display devices and systems.

Innovation Solution

A method and device that increment counter statuses in memory cells by adding a constant value to the beginning and subtracting it from the end of a sequence of memory cells, with recursive additions to lower rows or columns, reducing the number of increments needed and using a second memory for efficient storage and updating.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple adjacent memory cells are incremented simultaneously in real-time, then the measurement data can be updated continuously, but the memory access rate becomes extremely high and exceeds display device capabilities

Engineering Contradiction:
Improvemeasurement update rateVSAvoidmemory access rate
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent divides the memory into two separate memories: a first memory that stores the counter statuses to be incremented, and a second memory that stores the increment values. This segmentation allows the system to process increment operations separately from the actual counter status storage, reducing the memory access rate requirements while maintaining real-time update capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent pre-calculates and stores the increment values in the second memory before they are needed for updating the counter statuses. By preparing the increment data in advance in a separate memory structure, the system avoids performing complex increment operations during the critical real-time measurement update phase, thereby reducing memory access rate requirements.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If all memory cells in a row or column are incremented in every measuring cycle, then complete measurement data is captured, but the access rate significantly exceeds the sampling rate of the measured signal

Engineering Contradiction:
Improvemeasurement data completenessVSAvoidmeasurement cycle time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the increment operation into two distinct steps: first, incrementing the counter statuses in the first memory; second, updating the display with the accumulated measurement data. This segmentation allows the system to perform increment operations at a lower frequency, reducing the time loss while maintaining complete measurement data capture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a second memory as an intermediary structure that stores increment values separately from the counter statuses. This intermediary memory allows the system to batch process increment operations and update the display less frequently, thereby reducing the time loss associated with frequent memory access while preserving complete measurement data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8064567B2Method and device for the incremention of counter statuses stored in memory cells of a memory
Publication Date: 2011.11.22 ROHDE & SCHWARZ GMBH & CO KG
  • US8064567B2 patent drawing
  • US8064567B2 patent drawing
  • US8064567B2 patent drawing

AI summary

A method for the incrementation of counter statuses in memory cells, which are arranged respectively in rows and columns of a first memory adds a “1” to the memory content of a memory cell of a second memory, which corresponds to the memory cell at the start of a sequence of memory cells to be incremented in a row or column of the first memory in the case of every incrementation of a sequence of memory cells of the first memory, and adds a “−1” to the memory content of a memory cell of the second memory, which corresponds to the memory cell immediately following the memory cell at the end of the sequence of memory cells to be incremented associated with the start of the sequence, in the case of every incrementation of a sequence of memory cells of the first memory. It then recursively adds the memory content of a memory cell arranged in a row or column of the second memory to the memory content of the memory cell arranged in the next lower row or column of the first memory and stores the result of the addition in the memory cell arranged in the row or column of the first memory.