Nonvolatile Memory Coupling Compensation via Neighbor Sensing
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Solution Overview
Problem
The increasing coupling between adjacent floating gates in non-volatile semiconductor memory devices, particularly in multi-state flash memory, leads to erroneous readings due to shifts in apparent charge storage, which is exacerbated by shrinking memory cell sizes and reduced spacing between word and bit lines, affecting the accuracy of data storage in these devices.
Innovation Solution
A method is introduced to reduce coupling between adjacent floating gates by determining the condition of non-volatile storage elements, charging control lines accordingly, and compensating for capacitive coupling during read operations to ensure accurate data retrieval, utilizing a managing circuit that includes control circuitry and sense blocks to manage the charging and sensing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell sizes are shrunk and spacing between word and bit lines is reduced, then storage density is improved, but coupling between adjacent floating gates increases causing erroneous readings
Solution Approach 1:
The system performs preliminary sensing of adjacent bit lines before the main read operation. By detecting the charge state of neighboring floating gates in advance, the system can compensate for their coupling effect on the target memory cell during reading, preventing erroneous readings while maintaining high storage density
Solution Approach 2:
The system uses the sensing information from adjacent bit lines as feedback to correct the read value of the target memory cell. The managing circuit processes the sensing results and adjusts the read threshold voltage accordingly, creating a feedback mechanism that compensates for coupling effects and maintains reading accuracy despite reduced cell sizes
2Productivity
If multi-state flash memory is implemented with narrower threshold voltage ranges, then storage capacity per cell is improved, but floating gate coupling more easily shifts cells from allowed to forbidden ranges
Solution Approach 1:
The system performs preliminary sensing of adjacent bit lines before the main read operation. By detecting the charge state of neighboring floating gates in advance, the system can compensate for their coupling effect on the target memory cell during reading, preventing erroneous readings while maintaining high storage density
Solution Approach 2:
The system uses the sensing information from adjacent bit lines as feedback to correct the read value of the target memory cell. The managing circuit processes the sensing results and adjusts the read threshold voltage accordingly, creating a feedback mechanism that compensates for coupling effects and maintains reading accuracy despite reduced cell sizes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes the impact of floating gate to floating gate coupling, enhancing the accuracy of data storage and retrieval in multi-state flash memory devices by compensating for capacitive interactions, thereby maintaining data integrity and reliability as memory cell sizes decrease.
Implementation Method 1
Shifts in the apparent charge stored on a floating gate can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates
Implementation Method 2
The floating gate to floating gate coupling can occur between sets of adjacent memory cells that have been programmed at different times
Data Source
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AI summary
Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).