Memory Controller CRC Retrieval to Cut RAID Access Overhead
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Standard RAID error correction operations in memory devices, such as those used in Compute Express Link (CXL) devices, incur bandwidth penalties and amplification issues due to multiple memory accesses for data verification and correction, leading to increased latency and decreased throughput.
Innovation Solution
A memory system is configured to retrieve user data and cyclic redundancy check (CRC) information via a single access operation using data and data mask inversion (DMI) pins, allowing for efficient determination of bit errors and selective engagement of error correction processes, thereby minimizing unnecessary access operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple memory access operations are performed for data verification and error correction, then data integrity is improved, but bandwidth is reduced and latency is increased
Solution Approach 1:
The patent applies preliminary action by performing CRC verification in advance during the first memory access operation. The CRC information is retrieved and verified alongside the user data block, allowing the system to determine before subsequent operations whether error correction is needed. This preliminary verification prevents unnecessary second access operations, thereby maintaining high bandwidth while ensuring data integrity through advance error detection.
2Reliability
If multiple memory access operations are performed for data verification and error correction, then data integrity is improved, but latency is increased
Solution Approach 1:
The patent performs CRC verification as a preliminary action during the first memory access operation. By retrieving and verifying CRC information simultaneously with user data in the initial access, the system eliminates the need for sequential verification operations, thereby reducing latency while maintaining data integrity.
Solution Approach 2:
The patent merges the data retrieval and CRC verification operations into a single memory access operation. Both user data and CRC information are fetched in parallel during the first access, combining what would traditionally be separate operations into one unified action, thus reducing the total time required for verification.
3Reliability
If multiple memory access operations are performed for error correction, then error correction capability is improved, but network resource utilization is reduced
Solution Approach 1:
The patent performs preliminary CRC verification during the first access operation to determine in advance whether error correction is necessary. This preliminary check prevents unnecessary activation of error correction procedures and subsequent memory accesses, thereby conserving network resources and energy while maintaining full error correction capability when actually needed.
Data Source
AI summary
In some implementations, a memory controller may retrieve, via a first access operation, a block of user data and cyclic redundancy check (CRC) information associated with the block of user data, wherein the block of user data is retrieved using the one or more data pins, and wherein the CRC information is retrieved using one or more data mask inversion pins. The memory controller may determine, using the block of user data and the CRC information, whether the block of user data includes one or more bit errors. The memory controller may determine, based on whether the block of user data includes the one or more bit errors, whether to perform at least one of retrieving, via a second access operation, error correction information associated with the block of user data, or initiating a redundant array of independent disks error correction operation associated with the block of user data.