Memory Block Cycle Tracking via Redundant Page Programming
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Solution Overview
Problem
The challenge of managing the number of program/erase cycles in memory devices, which is crucial for indicating the health of the memory device, becomes increasingly complex as the number of managed memory devices grows, leading to significant pressure on memory controllers.
Innovation Solution
A method where a redundant memory block in the memory device tracks the number of program/erase cycles by counting the number of memory pages programmed, allowing the memory controller to indirectly monitor these cycles, thereby reducing its processing burden and preventing power failure losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the memory controller directly records and manages the number of program/erase cycles for each memory block, then the cycle count accuracy is improved, but the processing load and complexity of the memory controller increases
Solution Approach 1:
The memory device performs self-monitoring of program/erase cycles by having the peripheral circuit count erase instructions and track memory page states. The device autonomously determines cycle counts based on its own operational state without requiring continuous external management, thereby reducing controller complexity while maintaining accuracy.
Solution Approach 2:
The patent introduces an intermediary mechanism where the peripheral circuit within the memory device acts as a mediator between the memory blocks and the memory controller. This intermediary structure enables indirect tracking of cycle counts through memory page state changes, eliminating the need for the controller to directly monitor each block's cycle count.
2Reliability
If the memory controller continuously monitors and updates cycle counts for all memory blocks, then the data integrity is improved, but the risk of data loss during power failures increases
Solution Approach 1:
The patent implements beforehand cushioning by using the peripheral circuit's internal counting mechanism and memory page state tracking as a backup recording system. This pre-established redundancy ensures that even if the memory controller loses power, the cycle count information remains intact through the peripheral circuit's non-volatile tracking of memory page states.
Solution Approach 2:
The patent creates a copy of the cycle count information through the peripheral circuit's independent tracking mechanism. Instead of relying solely on the memory controller's volatile memory, the peripheral circuit maintains a parallel record based on memory page state changes, providing a failover copy of the data that prevents loss during power failures.
3Productivity
If the memory device tracks program/erase cycles by monitoring memory page states, then the processing pressure on the controller is reduced, but the measurement complexity increases
Solution Approach 1:
The peripheral circuit performs self-monitoring of memory page states and automatically determines cycle counts based on state changes. This self-service mechanism eliminates the need for the memory controller to perform complex monitoring operations, significantly reducing controller processing pressure while maintaining accurate cycle measurement through the peripheral circuit's autonomous tracking.
Data Source
AI summary
The present application discloses a memory device, a control method of a memory device, and a memory system, and belongs to the technical field of memory device. The control method includes: a peripheral circuit receiving an erase instruction, and recording a number of the received erase instructions, wherein the erase instruction is to instruct the peripheral circuit to erase one memory block in a memory cell array; and the peripheral circuit, in response to the number of the received erase instructions reaching a number threshold, selecting one memory page in a first memory block of the memory cell array to perform program processing.