Solid-State Memory Data Randomization via Block Access Count Shifting

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Solution Overview

Problem

Existing solid-state memory technologies, such as NAND flash memory, face accelerated wear due to repeated programming of the same program states, leading to uneven distribution of data across memory cells, which can result in premature degradation.

Innovation Solution

A method and apparatus that randomize write data by shifting a multi-bit sequence value stored in a register based on the accumulated access count for each erasable block, combining it with the input data using a combinatorial function to ensure equal distribution of program states across memory cells, thereby reducing wear and enhancing data security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is repeatedly programmed to the same program states in NAND flash memory, then data storage functionality is maintained, but memory cell wear accelerates and device longevity decreases

Engineering Contradiction:
Improvememory cell wear resistanceVSAvoiddevice longevity
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies dynamics by making the data sequencing pattern variable and adaptive rather than fixed. The system dynamically adjusts the sequencing pattern based on program/erase cycle counts and wear characteristics of different memory blocks, allowing the data distribution pattern to evolve over time and adapt to changing wear conditions, thereby preventing repeated stress on the same program states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes parameters by modifying the data sequencing pattern parameters (such as shift amounts and permutation patterns) based on accumulated access counts and wear metrics. By varying these parameters over time, the system ensures that data is distributed across different program states in each programming operation, preventing accelerated wear while maintaining storage functionality

Inventive Principle:
Principle #35Parameter changes

2Reliability

If data is uniformly distributed across memory cells, then wear is reduced, but data security against timing attacks may be compromised without proper randomization

Engineering Contradiction:
Improvewear distribution uniformityVSAvoidtiming attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-generating randomization sequences and applying them to data before programming operations. This preliminary randomization ensures that even if timing information is available, the actual data patterns being programmed are unpredictable, thereby protecting against timing attacks while achieving uniform wear distribution

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary randomization layer between the original data and the physical memory programming. This intermediary process uses pseudo-random sequences derived from wear metrics to transform the data pattern, creating a buffer that prevents direct correlation between timing information and underlying data patterns while maintaining uniform wear distribution

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10417122B2Data randomization using memory block access counts
Publication Date: 2019.09.17 SEAGATE TECH LLC
  • US10417122B2 patent drawing
  • US10417122B2 patent drawing
  • US10417122B2 patent drawing

AI summary

Method and apparatus for data storage. In some embodiments, a solid-state memory includes an array of non-volatile memory cells arranged into erasable blocks. A register stores a multi-bit sequence value. A controller randomizes input data to be written to a selected erasable block by combining the input data with the multi-bit sequence value shifted by a number of bit locations responsive to an accumulated access count for the selected erasable block.