Semiconductor Memory Data Bus Inversion Across Modes
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Solution Overview
Problem
Conventional semiconductor memory apparatuses operating at high frequencies face performance degradation due to noise and increased current consumption from frequent data switching, and data inversion is limited to DBI mode, causing interfacing difficulties with chipsets.
Innovation Solution
A semiconductor memory apparatus with a data bus inversion (DBI) section that decides data inversion based on logic levels, allowing data inversion in both DBI and normal modes, reducing current consumption by minimizing data input and output line toggling, and enabling data inversion irrespective of the operating mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data bus inversion is performed only in DBI mode as in conventional art, then interfacing with chipset is simplified, but data inversion cannot be performed in normal mode causing performance degradation at high frequencies
Solution Approach 1:
The data output section is designed to dynamically switch between inversion and non-inversion operations based on the operating mode signal. In DBI mode, the section performs data inversion to reduce switching activity, while in normal mode it outputs data without inversion. This dynamic adaptability allows the system to optimize performance for high-frequency operations in normal mode while maintaining noise reduction benefits in DBI mode, resolving the contradiction between versatility and complexity.
2Loss of energy
If data inversion decision is made after data output operation as in conventional art, then the data output section can operate independently, but current consumption increases due to toggling of data input and output lines
Solution Approach 1:
The DBI section performs data inversion decisions and generates inverted data before the data output section operates. By preparing the inverted data in advance based on the logic levels of input data, the system minimizes toggling of data lines during transmission, thereby reducing current consumption without introducing significant delay to the overall data output operation.
3Loss of energy
If data inversion is performed to minimize switching times, then current consumption is reduced, but noise is generated and misoperation occurs at high frequency band
Solution Approach 1:
The system changes the operational parameters of the data output section based on the operating mode. In DBI mode, data inversion is performed to minimize switching activity and reduce current consumption. In normal mode, the data output section operates without inversion to maintain signal integrity and reliability at high frequencies. This parameter change approach allows the system to optimize for energy efficiency when needed while maintaining reliability during high-frequency operations.
Data Source
AI summary
A semiconductor memory apparatus includes a data bus inversion (DBI) section configured to receive a plurality of input data and decide whether to invert or output, without an inversion, the plurality of input data depending upon logic levels of the plurality of data, and further configured to generate a plurality of inversion data based on the decision; and a data output section configured to receive the plurality of inversion data, invert or output, without an inversion the plurality of inversion data in response to a mode signal, and generate a plurality of output data.