Semiconductor Memory Data Conversion Control for Training Operations

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Solution Overview

Problem

Current semiconductor memory apparatuses face challenges in optimizing the operation margin between the system and the memory apparatus, particularly in controlling the conversion of serial to parallel data and vice versa, which affects efficiency and compatibility during training operations.

Innovation Solution

Incorporating a data conversion control block that generates and controls pipe input and output control signals in response to a training control signal, utilizing a plurality of pipe latches to sequentially convert parallel data into serial data, and selectively enabling pipe latches based on the training control signal to manage data conversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of pipe latches is fixed, then the device structure is simple, but the adaptability to different training requirements is poor

Engineering Contradiction:
Improveadaptability to training requirementsVSAvoiddevice structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic configurability of pipe latches by introducing a control signal that enables or disables specific pipe latches based on training requirements. This allows the data conversion block to adapt its functionality dynamically without changing the physical structure, resolving the contradiction between adaptability and structural simplicity.

Inventive Principle:
Principle #15Dynamics

2Productivity

If all pipe latches are always enabled, then the data conversion capability is maximized, but the operation margin optimization during training is reduced

Engineering Contradiction:
Improvedata conversion capabilityVSAvoidoperation margin
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies partial action by enabling only the necessary number of pipe latches based on the specific operation mode. During training operations, fewer pipe latches are enabled to optimize operation margin, while in normal operations, more pipe latches are enabled to maximize data conversion capability. This resolves the contradiction between productivity and reliability.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If the pipe latch configuration is changed frequently, then the optimization flexibility is improved, but the control complexity increases

Engineering Contradiction:
Improveoptimization flexibilityVSAvoidcontrol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal control mechanism where a single control signal serves multiple functions: it identifies training operations, determines the appropriate number of pipe latches to enable, and configures the data conversion block accordingly. This multi-functional control approach provides optimization flexibility without proportionally increasing control complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9875807B2Semiconductor memory apparatus converting serial type data into parallel type data in response to pipe control signals and pipe control signals during a training operation
Publication Date: 2018.01.23 SK HYNIX INC
  • US9875807B2 patent drawing
  • US9875807B2 patent drawing
  • US9875807B2 patent drawing

AI summary

A semiconductor memory apparatus may include a data conversion control block configured to control the number of pipe input control signals and the number of pipe output control signals which are enabled, in response to a training control signal. The semiconductor memory apparatus may also include a data conversion block configured to receive parallel data and output serial data, in response to the pipe input control signals and the pipe output control signals.