Memory Data Destruction Circuitry for Power-Loss Security
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Solution Overview
Problem
Volatile memory devices face data security risks due to delayed data loss after power interruption, which can be exploited by cooling the devices to retrieve stored data without authorization.
Innovation Solution
Incorporating data destruction circuitry that activates word lines to charge or discharge memory cell storage elements upon detecting conditions like power loss, power down, or unauthorized access attempts, ensuring data is irretrievably destroyed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If volatile memory is used to store data, then data can be retained during power supply, but data may be retrievable after power loss due to delayed data loss
Solution Approach 1:
The memory device performs preliminary data destruction actions automatically upon detecting power loss or power down conditions. The data destruction circuitry is activated in advance to charge or discharge storage elements before unauthorized access can occur, ensuring data is irretrievably destroyed without requiring external intervention.
Solution Approach 2:
The patent converts the harmful effect of power loss (which normally causes data retention) into a beneficial trigger for data destruction. Instead of allowing data to remain accessible after power loss, the system uses the power loss detection to activate destruction circuitry that charges or discharges storage elements, transforming the vulnerability into a security feature.
2Object-affected harmful factors
If data destruction circuitry is added to memory devices, then data security is improved, but device complexity increases
Solution Approach 1:
The data destruction circuitry is merged with the existing memory device architecture, combining the destruction function with the storage element control circuitry. The circuitry leverages existing word lines, bit lines, and storage elements while adding destruction capability, rather than implementing a completely separate system.
Solution Approach 2:
The memory device performs self-service data destruction automatically upon detecting power loss or power down conditions. The data destruction circuitry is activated autonomously without requiring external commands or intervention, using the device's own internal circuitry to charge or discharge storage elements and destroy data.
3Loss of time
If cooling is applied to memory devices, then data loss is delayed, but unauthorized access to data becomes possible
Solution Approach 1:
The memory device performs preliminary data destruction actions automatically upon detecting power loss or power down conditions. The data destruction circuitry is activated in advance to charge or discharge storage elements before unauthorized access can occur, ensuring data is irretrievably destroyed without requiring external intervention.
Solution Approach 2:
The system uses feedback from power loss detection to trigger data destruction. When the power supply status is monitored and a power loss or power down condition is detected, the feedback signal activates the data destruction circuitry to charge or discharge storage elements, creating a closed-loop security response that prevents unauthorized access.
Data Source
AI summary
Memory with data destruction circuitry (and associated systems, devices, and methods) is disclosed herein. In one embodiment, a memory device includes a memory array having memory cells arranged at intersections of corresponding word lines and corresponding bit lines. The memory device can be configured to detect that a data destruction condition is met. The data destruction condition can indicate that data stored in the memory cells is to be destroyed. Based at least in part on detecting that the data destruction condition is met, the memory device can (a) drive the corresponding word lines toward a first voltage to couple storage elements of the memory cells to the corresponding bit lines, and (b) charge or discharge the storage elements, via the corresponding bit lines, such that the data stored in the memory cells is destroyed.