Memory Control Data Flush for Lower Bootup Latency

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Solution Overview

Problem

Memory systems experience undesirable latency during bootup processes due to time-intensive recovery of outdated control information following hardware resets, which is inefficient and delays system operation.

Innovation Solution

Implementing data flush techniques where control information is transferred from volatile memory to non-volatile memory in response to a hardware reset signal, ensuring the most up-to-date version is available post-reset, thereby avoiding time-consuming recovery procedures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If control information is recovered from non-volatile memory after hardware reset, then system reliability is improved, but bootup latency increases

Engineering Contradiction:
Improvecontrol information availabilityVSAvoidbootup latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by flushing control information from volatile memory to non-volatile memory in advance of the hardware reset operation. This ensures that when the reset occurs, the control information is already available in non-volatile memory, eliminating the need for time-consuming recovery operations after reset and thus reducing bootup latency while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

2Speed

If control information is stored in volatile memory, then access speed is improved, but data loss occurs during hardware reset

Engineering Contradiction:
Improvecontrol information access speedVSAvoidcontrol information loss
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The patent applies copying by creating a duplicate copy of the control information in non-volatile memory before the hardware reset occurs. The volatile memory retains the control information for fast access during operation, while the copied version in non-volatile memory serves as a backup that survives the reset, preventing information loss while maintaining access speed

Inventive Principle:
Principle #26Copying

3Productivity

If data flush operation is performed before hardware reset, then bootup efficiency is improved, but additional processing time is required

Engineering Contradiction:
Improvebootup efficiencyVSAvoidflush operation duration
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by performing the data flush operation in advance of the hardware reset, during a period when the system is still operational. Although this adds processing time before reset, it eliminates the need for lengthy recovery operations after reset, resulting in net improvement of bootup efficiency and reducing the overall duration of system unavailability

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250284418A1Data flush techniques for memory
Publication Date: 2025.09.11 MICRON TECHNOLOGY INC
  • US20250284418A1 patent drawing
  • US20250284418A1 patent drawing
  • US20250284418A1 patent drawing

AI summary

Methods, systems, and devices for data flush techniques for memory are described. For example, following a reset or initialization operation, the memory system may transfer control information from the non-volatile memory of the memory system to the working memory of the system to utilize in various operations. In some examples, while performing the operations associated with the control information, the control information may be updated. the memory system may then receive a hardware reset signal. In response to the hardware reset signal, the memory system may transfer the updated control information from the working memory to the non-volatile memory of the memory system so that the updated control information is available after the subsequent reset.