Memory Data Line Segmentation for Program Disturb Reduction

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Program disturb issues occur in flash memory devices, particularly in Multilevel Cell (MLC) memory, where memory cells intended for different programming levels can be inadvertently programmed or have their threshold voltages shifted due to parasitic capacitances and currents during the programming of adjacent cells.

Innovation Solution

The solution involves biasing data lines such that at least two inhibited memory cells are present between memory cells selected for programming, thereby reducing parasitic capacitances and currents, and using multiple logical pages per row to minimize the impact of programming pulses on adjacent cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are programmed using conventional bit line biasing, then programming operation can be performed, but program disturb occurs due to parasitic capacitances and currents affecting adjacent cells

Engineering Contradiction:

Improveprogramming operationVSAvoiddata integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The bit line is segmented into multiple segments, with at least one segment being inhibited from receiving the programming pulse. This segmentation creates isolated regions that prevent parasitic currents from spreading to adjacent memory cells, thereby eliminating program disturb while maintaining programming functionality in the active regions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

An inhibited memory cell acts as an intermediary element between active memory cells during programming. This inhibited cell receives the programming pulse but is configured to inhibit further programming, serving as a barrier that blocks parasitic effects from propagating to neighboring cells while allowing the programming operation to proceed in the active regions.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If multiple memory cells are programmed simultaneously in the same row, then programming efficiency increases, but parasitic effects increase causing program disturb

Engineering Contradiction:

Improveprogramming efficiencyVSAvoidparasitic effects

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

Different segments of the bit line are given different qualities - some segments are enabled to receive programming pulses while others are inhibited. This local differentiation allows simultaneous programming operations in enabled regions while preventing parasitic effects from spreading to inhibited regions, maintaining both efficiency and data integrity.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS8605509B2Data line management in a memory device

Publication Date: 2013.12.10 MICRON TECHNOLOGY INC

AI summary

Methods for programming a memory device, memory devices configured to perform the disclosed programming methods, and memory systems having a memory device configured to perform the disclosed programming methods are provided. According to at least one such method, multiple pages of memory cells are inhibited during a programming operation such that memory cells enabled for programming are separated by two or more inhibited memory cells of the same row of memory cells regardless of the intended pattern of data states to be programmed into that row of memory cells.