Memory Data Generation Multiplexer for Defective Column Replacement
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Solution Overview
Problem
Conventional memory systems face complexity and increased circuit size when handling large data output due to the need for redundant columns, which complicates wiring and increases the scale of the circuit.
Innovation Solution
A data generation apparatus that includes a controller with a bad-column information generating unit, storage unit, and write/read data generating units, which detect and manage defective data lines by generating appropriate data output based on bad-column information, reducing the need for redundant columns and simplifying data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant columns are integrated in the memory system to replace bad columns, then reliability is improved, but device complexity increases due to complicated wiring and larger circuit scale
Solution Approach 1:
The patent uses a multiplexer to copy and redirect data from redundant columns to replace bad columns dynamically. Instead of permanently integrating redundant columns into the memory array structure, the system creates functional copies through the multiplexer that can substitute defective columns on demand, thereby maintaining reliability without permanently increasing device complexity
Solution Approach 2:
The patent implements dynamic column replacement by using a multiplexer that can flexibly switch between normal and redundant columns based on detected bad columns. This dynamic approach allows the system to adapt to different failure scenarios without requiring a fixed, complex redundant structure, thus improving reliability while controlling device complexity
2Reliability
If a multiplexer circuit is used to output predetermined data while replacing bad columns, then reliability is improved, but device complexity increases when the number of data to be outputted is large
Solution Approach 1:
The patent segments the data output process by dividing it into multiple stages handled by different multiplexers. The first multiplexer handles column selection and initial data routing, while the second multiplexer handles final data output. This segmentation allows each multiplexer to operate on a smaller data subset, reducing the complexity of individual circuits while maintaining overall reliability through coordinated operation
Solution Approach 2:
The patent introduces an intermediate processing stage between the memory array and final output, where the first multiplexer acts as an intermediary to pre-process and route data before it reaches the second multiplexer. This intermediary approach breaks down the complex task of handling large data volumes into manageable steps, reducing the burden on any single circuit component
Data Source
AI summary
An apparatus according to an embodiment comprises a first storage, a second storage, an input unit, a shift number determining unit, and an output unit. The first storage stores identification information of sectors and defective information indicating a presence of defect on the data line, while associating the identification information and the defective information. The second storage has storage regions in a number larger than the first number. The input unit inputs data to the second storage by the first number at a time. The shift number determining unit determines a shift number. The output unit outputs the data stored in the storage regions which is after a head storage region by the shift number, as the data is to be supplied to the data line having no defect sector based upon the defective information, and outputs information that differs from the data to the defective data line.