Semiconductor Memory Data Path Switching for Row Block Selection

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Solution Overview

Problem

In semiconductor memory devices with an open bit line structure, data collision occurs when an even number of row blocks are selected, limiting performance improvement due to the inability to freely select the number of row blocks without causing data collision on global data lines.

Innovation Solution

A semiconductor memory device configuration that includes a cell array with a first and second row block, a bit line sense amplifier block, a local sense amplifier, and a switch that connects the local sense amplifier to either an even or odd global data line based on a select signal, allowing for the selection of edge row blocks and inner row blocks without data collision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If an even number of row blocks are selected to meet various requirements, then the memory device can satisfy design specifications, but data collision occurs on the global data line which limits performance improvement

Engineering Contradiction:

Improveability to select even number of row blocksVSAvoiddata collision on global data line

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

A switch is introduced as an intermediary component between the local sense amplifier and the global data lines. This switch selectively connects the local sense amplifier to either the even global data line or the odd global data line based on which row block is activated, thereby preventing data collision while maintaining the ability to use an even number of row blocks.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The data path configuration is made dynamic through the switch that can change connection states based on row block activation. When the first row block is activated, the local sense amplifier connects to the even global data line; when the second row block is activated, it connects to the odd global data line. This dynamic reconfiguration prevents data collision while preserving design flexibility.

Inventive Principle:

Principle #15Dynamics

2Reliability

If the number of row blocks is fixed to avoid data collision, then data collision is prevented, but the memory device cannot freely select the number of row blocks which limits performance optimization

Engineering Contradiction:

Improveprevention of data collisionVSAvoidfreedom to select number of row blocks

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically reconfigures the data path based on which row block is activated. The switch changes connection states in real-time, allowing the memory device to use an even number of row blocks without fixed constraints, thereby optimizing performance while preventing data collision through adaptive path selection.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The switch provides multi-functionality by enabling the local sense amplifier to connect to different global data lines (even or odd) based on operational requirements. This universal connection capability allows the memory device to freely select the number of row blocks while maintaining reliable data transmission without collision.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Quantity of substance

If edge row blocks are selected simultaneously with even number of row blocks, then more memory capacity is accessible, but data collision occurs on the global data line

Engineering Contradiction:

Improvememory capacity accessibilityVSAvoiddata collision on global data line

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The switch acts as an intermediary that routes data from edge row blocks to appropriate global data lines. When edge row blocks are selected, the switch ensures data is directed to the correct global data line (even or odd) based on activation status, enabling full memory capacity access while preventing data collision through intelligent routing.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10553273B2Semiconductor memory device and data path configuration method thereof

Publication Date: 2020.02.04 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor memory device includes a cell array that includes a first row block and a second row block, a bit line sense amplifier block that senses data stored in the first row block or the second row block, a local sense amplifier that latches the sensed data transferred from the bit line sense amplifier block, and a switch that connects the local sense amplifier with a selected one of a first global data line and a second global data line in response to a select signal. The second row block may be placed at an edge of the cell array, and the switch connects the local sense amplifier with the first global data line when the first row block is activated and connects the local sense amplifier with the second global data line when the second row block is activated.