Memory Controller Data Rearrangement for Cell Interference Reduction
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Solution Overview
Problem
High integration in non-volatile memory devices leads to interference between memory cells, such as coupling, program disturbance, and channel-coupled disturbance, causing threshold voltage distribution spread, which existing technologies like Charge Trap Flash (CTF) memory struggle to fully address, and robust Error Correction Codes (ECC) are costly solutions.
Innovation Solution
A data storage device with a memory controller that modifies the arrangement of program data to eliminate specific interference patterns, using techniques like ECC encoding, Run-Length Limited (RLL) coding, and line coding to prevent patterns like 'P-E-P' and 'R-R-R' that cause interference between adjacent memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If higher integration is implemented to improve memory density, then storage capacity increases, but interference between adjacent memory cells increases causing threshold voltage distribution spread
Solution Approach 1:
The patent applies preliminary action by modifying the program data arrangement before writing to memory cells. The memory controller identifies and eliminates interfering data patterns (such as alternating patterns like 010101 or 101010) that would cause lateral charge spreading and threshold voltage distribution spread. By pre-processing the data to avoid worst-case patterns, the system maintains high integration benefits while preventing interference-related reliability degradation.
2Reliability
If robust Error Correction Code (ECC) is used to reduce interference consequences, then data reliability improves, but system cost increases
Solution Approach 1:
The patent implements preliminary action by preventing interference patterns before they occur, rather than correcting errors after they happen. The memory controller modifies program data to eliminate patterns known to cause lateral charge spreading and interference. This preventive approach reduces the burden on ECC circuits, allowing the system to achieve high data reliability with less complex and lower-cost ECC implementation compared to systems that rely solely on post-programming error correction.
Data Source
AI summary
A data storage device includes a non-volatile memory device including a plurality of memory cells and a memory controller. The memory controller is configured to modify an arrangement of program data and to program the modified program data into the plurality of memory cells. The memory controller modifies the program data to eliminate a given data pattern causing physical interference between adjacent memory cells from the modified program data.