Memory Data Receiver Circuit Using Preselected Reference Voltages

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Solution Overview

Problem

Existing semiconductor circuits for data reception face challenges in ensuring data correctness while minimizing signal feedback time due to the influence of preceding data signals, which affects performance.

Innovation Solution

A circuit for receiving data that generates two reference voltage signals with different voltage values, allowing selection of an appropriate target signal based on the level state of the previous data signal, eliminating the need for real-time feedback adjustment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If decision feedback equalization is used to eliminate influence from preceding data signals, then data reception correctness is improved, but signal feedback time increases

Engineering Contradiction:
Improvedata reception correctnessVSAvoidsignal feedback time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores multiple reference voltage values corresponding to different preceding data signal levels (00, 01, 10, 11) in a lookup table before actual data reception. When a data signal is received, the circuit directly queries the pre-computed reference voltage based on the preceding signal level, eliminating the need for real-time feedback adjustment and reducing signal feedback time while maintaining data reception correctness

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the reference voltage parameter based on the level state of preceding data signals. By storing multiple reference voltage values (first reference voltage value for level 0, second reference voltage value for level 1, etc.) and selecting the appropriate one based on the preceding signal level, the circuit adapts to different signal conditions without requiring time-consuming feedback loops

Inventive Principle:
Principle #35Parameter changes

2Reliability

If real-time feedback adjustment is performed based on preceding data signal level, then data reception correctness is improved, but processing speed decreases

Engineering Contradiction:
Improvedata reception correctnessVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs the complex feedback adjustment calculation in advance by pre-computing reference voltage values for all possible preceding signal levels and storing them in a lookup table. During actual operation, the circuit only needs to perform a simple table lookup and selection, dramatically improving processing speed while maintaining data reception correctness

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates copies of reference voltage values for different preceding signal levels and stores them in advance. Instead of performing real-time feedback adjustment, the circuit selects the appropriate pre-computed reference voltage copy based on the preceding signal level, thereby improving processing speed without sacrificing reliability

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12482516B2Circuit for receiving data and memory
Publication Date: 2025.11.25 CHANGXIN MEMORY TECH INC
  • US12482516B2 patent drawing
  • US12482516B2 patent drawing
  • US12482516B2 patent drawing

AI summary

A circuit for receiving data includes a voltage generating circuit, a data circuit and a selection circuit. The voltage generating circuit is configured to output, in a first mode, a first reference voltage signal and a second reference voltage signal. The data circuit is configured to compare the data signal with the first reference voltage signal, output a first target signal, compare the data signal with the second reference voltage signal, and output a second target signal. The data signal is one of a plurality of data signals arranged in series. The selection circuit is configured to determine one of the first target signal and the second target signal as a target data signal based on a level state of a previous data signal of the data signal.