Memory Device Data Retention During Power-Down Mode

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Solution Overview

Problem

Conventional semiconductor memory devices cannot retain data during the deep power-down mode (DPD) because internal voltage generators are disabled, leading to increased power consumption and the need to transfer data to another storage location before entering DPD mode.

Innovation Solution

A memory device with a bit line sense amplifier and a bit line sense amplifier controller that selectively applies either an internal or external voltage to the bit line sense amplifier based on the operating mode, allowing data retention during DPD mode by switching to an external voltage supply when in DPD mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If internal voltage generators are disabled to reduce power consumption in DPD mode, then power consumption is reduced, but data retention capability is lost

Engineering Contradiction:

Improvepower consumptionVSAvoiddata retention capability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent segments the voltage supply system into internal voltage generators and external voltage sources. During DPD mode, the internal voltage generators are disabled to save power, while the bit line sense amplifier continues to operate using external voltage supplied through the voltage generator enable circuit, allowing data retention without requiring full internal voltage generation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The voltage generator enable circuit acts as an intermediary between the external voltage source and the bit line sense amplifier. It selectively enables external voltage supply to the sense amplifier during DPD mode, allowing the amplifier to retain data using external power while the internal voltage generators remain disabled.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If bit line sense amplifier operates using external voltage during DPD mode, then data retention is enabled, but device complexity increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoidvoltage supply control complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The voltage generator enable circuit serves multiple functions: it controls the enable/disable state of internal voltage generators during normal operation and selectively enables external voltage supply to the bit line sense amplifier during DPD mode. This multi-functionality reduces the need for separate control circuits.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The bit line sense amplifier is designed to be self-sufficient by being able to operate using either internal voltage generators during normal mode or external voltage during DPD mode. The amplifier automatically adapts to the operating mode through the voltage generator enable circuit without requiring manual intervention or complex external control.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS7492654B2Memory device for retaining data during power-down mode and method of operating the same

Publication Date: 2009.02.17 SAMSUNG ELECTRONICS CO LTD

AI summary

A memory device includes a bit line sense amplifier, a command decoder configured to generate an internal control signal indicating an operating mode of the memory device, and a bit line sense amplifier controller configured to selectively apply an external voltage as a supply voltage to the bit line sense amplifier in response to the internal control signal.