Non-Volatile Memory Data Strobe Signal Delay Control
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Solution Overview
Problem
As the frequency of the external clock signal increases in non-volatile memory devices, the delay between the data strobe signal and the clock signal becomes significant, leading to desynchronization and potential data transfer errors, exacerbated by factors like operating temperature, voltage, and fabrication processes, as well as unmatched loading/routing and simultaneous switching noise.
Innovation Solution
A non-volatile memory device is designed with a synchronization circuit, a data strobe output buffer, and a delay control circuit, which includes a delay circuit responsive to a delay control signal to modify the signal delay of the data strobe signal, ensuring synchronization with the external clock signal, even at higher clock frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the external clock frequency is increased to achieve higher data transfer rate, then the productivity is improved, but the delay between data strobe signal and clock signal becomes significant causing desynchronization and data transfer errors
Solution Approach 1:
The patent implements a delay control circuit that dynamically adjusts the delay of the data strobe signal based on the external clock frequency. The delay amount is not fixed but can be modified in real-time to maintain synchronization as the clock frequency changes, thereby resolving the contradiction between high data transfer rate and synchronization accuracy
Solution Approach 2:
The patent changes the delay parameter of the data strobe signal to adapt to different operating conditions. By adjusting the delay amount according to the external clock frequency and other factors, the system maintains reliable synchronization even at higher clock frequencies, thus improving productivity without sacrificing reliability
2Reliability
If the delay of data strobe signal is adjusted to compensate for process variations, then the reliability is improved, but the device complexity increases due to additional delay control circuitry
Solution Approach 1:
The patent employs a feedback mechanism where the delay control circuit monitors synchronization status and adjusts the data strobe delay accordingly. This feedback-based approach automatically compensates for process variations and maintains reliable synchronization without requiring complex manual calibration or multiple fixed-delay circuits
Solution Approach 2:
The delay control circuit serves multiple functions: it compensates for process variations, adapts to different clock frequencies, and maintains synchronization across varying operating conditions. This multi-functionality reduces the need for separate compensation circuits, thereby limiting the increase in device complexity while improving reliability
Data Source
AI summary
A non-volatile memory device includes a memory core storing data to be output from the memory core according to an external clock signal, an input buffer receiving the external clock signal and providing an input clock signal, and a synchronization circuit including a delay circuit and configured to receive the input clock signal, provide an output clock signal, and synchronize the output clock signal to the external clock signal. The device further includes a data strobe output buffer receiving the output clock signal and providing a data strobe signal having a signal delay configurable relative to the external clock signal, a clocked circuit element receiving the data and the output clock signal and outputting the data in synchronism with the output clock signal, and a delay control circuit providing a delay control signal to the delay circuit to modify the signal delay of the data strobe signal.