Memory Decoder Seed Selection for Low-BER NAND Reads

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Solution Overview

Problem

Memory systems, particularly in portable devices, face challenges with high bit error rates due to the variability in noise across different program voltage levels, leading to inefficiencies in data storage and retrieval.

Innovation Solution

A fast decoding scheme is implemented using a memory system with a decoder that generates seeds based on physical addresses, descrambles sequences, and selects the appropriate descrambled sequence based on syndrome weight values, thereby reducing bit error rates and improving data access efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If guided scrambling is used to reduce bit error rates in memory systems, then data reliability is improved, but decoding complexity and time increase

Engineering Contradiction:
Improvebit error rateVSAvoiddecoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating syndrome weights for all possible scrambled sequences during the encoding phase and storing them in a lookup table. During decoding, the received sequence is simply looked up in this pre-prepared table, avoiding complex real-time syndrome calculations. This shifts the computational burden to the encoding phase, making the decoding phase fast and simple while maintaining reliability improvements from guided scrambling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating multiple copies of the same data with different scrambling seeds and storing them in different physical locations. During read operations, all copies are retrieved and the correct one is identified using pre-computed syndrome weights. This copying approach allows the system to benefit from multiple scrambled versions without increasing decoding complexity, as the selection process uses simple lookup rather than complex comparison.

Inventive Principle:
Principle #26Copying

2Measurement precision

If multiple descrambling operations are performed to handle variability in noise across program voltage levels, then data accuracy is improved, but processing time increases

Engineering Contradiction:
Improvedata accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-computing syndrome weights for all possible descrambled sequences during system initialization or encoding. These pre-computed weights are stored in a lookup table that enables fast comparison during decoding. This eliminates the need for time-consuming real-time syndrome calculations when multiple descrambling operations are needed, allowing the system to maintain high data accuracy while minimizing processing time penalties.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies dynamics by making the descrambling process adaptive based on the received signal quality and syndrome weight comparisons. Instead of performing all descrambling operations uniformly, the system dynamically selects the appropriate descrambling path based on pre-computed syndrome weights and actual received data characteristics. This dynamic approach allows the system to handle noise variability efficiently without always performing the maximum number of descrambling operations.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If syndrome weight calculation is performed for each descrambled sequence, then error detection accuracy is improved, but computational overhead increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoidcomputational overhead
Core Design Contradiction:
Measurement precisionVSPower

Solution Approach 1:

The patent uses copying by pre-calculating and storing syndrome weights for all possible sequences in a lookup table during system initialization or encoding phase. During decoding, instead of performing complex syndrome calculations for each received sequence, the system simply copies the pre-computed syndrome weight from the lookup table using the received sequence as an index. This copying approach maintains high error detection accuracy while dramatically reducing computational overhead during actual read operations.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent applies preliminary action by performing all syndrome weight calculations in advance during encoding or system initialization, rather than during the time-critical decoding operation. The pre-computed syndrome weights are stored and reused for multiple reads of the same data, amortizing the computational cost over many operations. This shifts the computational burden to a non-critical phase, maintaining error detection accuracy while minimizing real-time processing power requirements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11150985B2Decoder for memory system and method thereof
Publication Date: 2021.10.19 SK HYNIX INC
  • US11150985B2 patent drawing
  • US11150985B2 patent drawing
  • US11150985B2 patent drawing

AI summary

Decoders are provided for memory systems. A decoder includes a seed generator that generates seeds based on a physical address corresponding to a read request from a host; a descrambling module that receives a sequence from a storage area among, multiple storage areas, corresponding to the physical address, and descrambles the sequence using the seeds to generate multiple descrambled sequences; and a selector that selects one of descrambled sequences based on syndrome weight values of the descrambled sequences.