Concatenated Memory Decoding for Fast Hard-Decision Error Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory systems face limitations in decoding capabilities during hard-decision reading, as they often cannot correct errors beyond the number of possible corrections determined by the code's minimum distance, especially when using algebraic codes.

Innovation Solution

A memory system that employs a concatenation code structure, combining an algebraic code as an external code and a sparse graph-based code as an internal code, enables decoding that exceeds the number of possible corrections by utilizing information from the internal code, allowing for high correction capability during hard-decision reading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hard-decision reading is performed with conventional algebraic codes, then reading speed is fast, but decoding capability is limited to the number of possible corrections

Engineering Contradiction:
Improvedecoding capabilityVSAvoidcode structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The code is divided into two segments: an external algebraic code for fast hard-decision decoding and an internal sparse graph-based code for enhanced error correction. The external code handles the majority of decoding tasks quickly, while the internal code provides additional correction capability for cases exceeding the external code's limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a composite coding structure combining two different code types (algebraic code and sparse graph-based code) to achieve properties that neither code alone can provide: the speed of hard-decision decoding and the high correction capability typically requiring soft-decision methods.

Inventive Principle:
Principle #40Composite materials

2Reliability

If soft-decision reading is performed to achieve high correction capability, then decoding performance improves, but reading delay increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidreading delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The decoding process dynamically adapts its approach: it first attempts fast hard-decision decoding, and only when errors exceed the correction capability does it switch to the more time-consuming soft-decision process for the remaining uncoded bits. This dynamic approach minimizes average reading delay while maintaining high correction capability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The external algebraic code performs preliminary error correction on all bits before any soft-decision processing is considered. This preliminary action corrects the majority of errors quickly, reducing the amount of data that requires time-consuming soft-decision processing.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If conventional single code structure is used, then device complexity is low, but correction capability exceeds不了 the code's minimum distance

Engineering Contradiction:
Improvecorrection capabilityVSAvoiddecoder structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoder is segmented into two independent decoding units: an external code decoder for algebraic code decoding and an internal code decoder for sparse graph-based code decoding. This segmentation allows each decoder to be optimized for its specific code type while working together to achieve enhanced overall correction capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism that coordinates between the external and internal code decoders. This intermediary manages the interaction between the two decoding processes, allowing errors to be corrected by either decoder and ensuring that the combined correction capability is fully utilized without excessive complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10574272B2Memory system
Publication Date: 2020.02.25 KIOXIA CORP
  • US10574272B2 patent drawing
  • US10574272B2 patent drawing
  • US10574272B2 patent drawing

AI summary

A memory system includes a nonvolatile memory and a memory controller configured to perform reading of a concatenation code from the nonvolatile memory in response to an external command, the memory controller including a decoder circuit which decodes a reception word in the concatenation code. The decoder circuit includes a first external code decoder that performs decoding on an external code portion, an internal code in-error bit estimation unit that performs estimation of an in-error bit on a bit sequence from the first external code decoder, based on a rule for an internal code in the concatenation code, and outputs a set of in-error bits that is obtained by the estimation, and a second external code decoder that performs decoding which uses the set of in-error bits that is output from the internal code in-error bit estimation unit, on the bit sequence from the first external code decoder.