Memory Cell Decoding Using Neighbor-State Reliability Adjustment

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Solution Overview

Problem

Rewritable non-volatile memory modules, especially those with three-dimensional memory cell arrays, face challenges in maintaining data integrity due to the loss of electrical charges, leading to errors in data reading and decoding, particularly when the distance between memory cells is short, causing instability in data storage and retrieval.

Innovation Solution

A decoding method that involves reading data from a memory cell, obtaining the storage state of a different memory cell, and using this information to determine customized reliability data for decoding, enhancing the success rate of data decoding by adjusting reliability information based on the storage states of adjacent memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the distance between memory cells is reduced to increase storage density, then storage capacity is improved, but electrical charge loss increases leading to higher error rates

Engineering Contradiction:
Improvestorage densityVSAvoiddata integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by obtaining storage states of neighboring memory cells before decoding the target data. This advance information about adjacent cell states is used to adjust reliability information for the target bit, enabling the decoding process to account for potential charge loss effects that occur due to close proximity between cells. This preparatory step improves decoding accuracy without requiring physical separation of cells.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If traditional decoding with default reliability information is used, then decoding process is simple, but decoding success rate decreases when errors are present

Engineering Contradiction:
Improvedecoding complexityVSAvoiddecoding success rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements local quality by adjusting reliability information specifically for bits that are likely to be affected by charge loss, rather than uniformly treating all bits. The reliability adjustment is localized to specific bits based on the storage states of their neighboring cells. This approach maintains simplicity for bits that are not affected while improving accuracy for vulnerable bits, thus balancing complexity and success rate.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the reliability parameter dynamically based on neighboring cell states. Instead of using fixed default reliability information, the system adjusts the reliability value for each bit according to the storage states of adjacent cells. This parameter change enables the decoding process to adapt to local conditions and improve success rate without requiring a complete redesign of the decoding architecture.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If reliability information is adjusted based on neighboring memory cell states, then decoding accuracy is improved, but processing complexity increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies partial action by adjusting reliability information only for bits that are likely to be affected by charge loss, rather than processing all bits uniformly. The system selectively obtains storage states of neighboring cells and adjusts reliability information only where needed based on the detected error patterns. This partial approach improves decoding accuracy for vulnerable bits while avoiding unnecessary processing overhead for robust bits.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10622077B2Decoding method, memory storage device and memory control circuit unit
Publication Date: 2020.04.14 PHISON ELECTRONICS
  • US10622077B2 patent drawing
  • US10622077B2 patent drawing
  • US10622077B2 patent drawing

AI summary

A decoding method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The decoding method includes: reading first data from memory cells of the rewritable non-volatile memory module, wherein the first data includes a first bit stored in a first memory cell; obtaining a storage state of at least one second memory cell which is different from the first memory cell; obtaining first reliability information corresponding to the first bit according to the storage state of the second memory cell, wherein the first reliability information is different from default reliability information corresponding to the first bit; and decoding the first data according to the first reliability information. Therefore, a decoding efficiency can be improved.