Online Memory Defect Repair via Central and Data Buffers

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Solution Overview

Problem

Current memory repair technologies cannot perform online repairs during the use of a main memory, leading to potential operational issues in critical systems like servers and workstations due to undetected defective memory cells.

Innovation Solution

An apparatus and method that includes a central buffer for recording defective addresses and a data buffer for managing data access, allowing for the generation of repair access commands to address and correct defective memory cells during operation, enabling online repair by buffering data and comparing target data with repair data for consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of repair

If current memory repair technologies are used, then damaged memory cells can be repaired, but only offline repair is possible which stops memory operation

Engineering Contradiction:
Improvememory cell repair capabilityVSAvoidmemory operation continuity
Core Design Contradiction:
Ease of repairVSProductivity

Solution Approach 1:

The patent pre-allocates spare memory cells and configures repair logic circuits during memory module manufacturing. Defective cell addresses are recorded in a defect database beforehand, and repair mappings are pre-established, enabling immediate online repair without stopping operation when defects are detected

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a buffer memory as an intermediary component between the main memory and the controller. The buffer temporarily stores data during repair operations, allowing defective cells to be repaired without interrupting the overall memory operation flow and maintaining system productivity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of repair

If current memory repair technologies are used, then repair function is provided, but additional test software is required which increases system complexity

Engineering Contradiction:
Improvememory repair functionVSAvoidsystem software requirement
Core Design Contradiction:
Ease of repairVSDevice complexity

Solution Approach 1:

The patent implements self-service repair by integrating repair logic circuits directly into the memory module. The repair controller automatically detects defective cells, queries the defect database, and activates spare cells without requiring external test software, thereby reducing system complexity while maintaining repair functionality

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the repair function with the existing memory control logic by integrating repair controllers and logic circuits into the memory module structure. The defect database is combined with the memory configuration data, allowing repair operations to be performed through the same control interface as normal memory operations

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If online repair is implemented, then memory operation continuity is maintained, but additional buffers and control logic are required which increases device complexity

Engineering Contradiction:
Improvememory operation continuityVSAvoidbuffer and control logic structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs the buffer memory and control logic to serve multiple functions: normal data buffering during read/write operations, temporary storage during repair operations, and defect database management. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity while enabling continuous operation

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11417414B2Apparatus and method for repairing a defect of a memory module, and a memory system
Publication Date: 2022.08.16 MONTAGE TECHNOLOGY CO LTD
  • US11417414B2 patent drawing
  • US11417414B2 patent drawing
  • US11417414B2 patent drawing

AI summary

The present application discloses an apparatus for repairing a defect of a memory module, comprises: a central buffer having an address recording module for recording defective address information indicating one or more defective memory addresses in the memory module; the central buffer is configured to receive an access command for accessing a target address in the memory module from a memory interface, and to determine whether to generate a repair access command for repairing the target address according to a comparison result; and a data buffer having a data recording module for recording repair data; wherein the data buffer is coupled between the memory interface and the memory module to buffer data interacted therebetween, and is coupled to the central buffer to receive the access command or the repair access command; the data buffer is configured to write target data associated with the access command into the data recording module as repair data corresponding to a target address according to the repair access command, or read repair data from the data recording module as target data corresponding to a target address.