Memory Device Read Write Method for Defective Cell Avoidance
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Solution Overview
Problem
Semiconductor memory devices face reliability issues due to defective or damaged storage cells, leading to reduced performance and shortened service life, as existing error correction methods cannot effectively identify and avoid invalid storage cells during read/write operations.
Innovation Solution
A read/write method that stores address information of error-prone storage cells in a preset space, allowing for real-time differentiation between valid and invalid cells, and adjusts operations accordingly to prevent data errors and loss, thereby enhancing memory device reliability and extending its service life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction methods are used, then data errors can be corrected, but defective storage cells cannot be identified and avoided, leading to repeated errors and reduced reliability
Solution Approach 1:
The patent applies preliminary action by proactively detecting and recording defective storage cell addresses in a mark space before they cause data loss. The system performs preliminary identification of bad cells and stores their addresses in advance, allowing the control logic to prevent future access to these cells, thereby improving reliability without adding complex real-time correction mechanisms
Solution Approach 2:
The patent segments the memory system into three functional parts: the main storage array, a separate mark space for storing defective cell addresses, and a control logic unit. This segmentation allows the error handling functionality to be isolated and managed independently, improving reliability while keeping the overall system architecture clear and manageable
2Reliability
If all storage cells are used without identification, then memory capacity is maximized, but defective cells cause data errors and reduce service life
Solution Approach 1:
The patent extracts defective storage cell addresses from the main storage array and stores them separately in a mark space. This extraction allows the system to identify and isolate problematic cells without removing them from the physical memory array, thereby maintaining maximum storage capacity while ensuring data accuracy by preventing access to defective cells
Solution Approach 2:
The mark space acts as an intermediary between the storage cells and the control logic. Instead of directly monitoring each storage cell for errors, the system uses the mark space as a mediator to store pre-identified defective cell addresses, allowing the control logic to efficiently prevent access to bad cells without complex real-time detection mechanisms
3Reliability
If write operations are performed without checking address validity, then write speed is maximized, but data may be written to defective cells causing errors
Solution Approach 1:
The patent applies preliminary action by pre-loading defective cell addresses into the mark space before write operations begin. The control logic then quickly checks incoming write addresses against this pre-prepared mark space, enabling fast write operations while maintaining data integrity through proactive error prevention rather than reactive correction
Data Source
AI summary
A read/write method includes: applying a read command to a memory device, the read command pointing to address information, reading to-be-read data from a storage cell corresponding to the address information to which the read command points, and if an error occurs in the to-be-read data, storing the address information to which the read command points in a preset storage space. The read/write operation is not performed on the address information stored in the preset storage space when the user executes the read or write operation on the memory device, which avoids a data error or data loss and greatly improves the reliability and prolongs the service life of the memory device.