Memory Device Defense Circuit Against Row Hammering
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Solution Overview
Problem
Existing memory devices are vulnerable to row-hammering (RH) attacks, which exploit the refresh operation of dynamic random access memory (DRAM) to gain administrator privileges or cause system crashes. Current defense techniques, such as target row refresh (TRR), struggle to balance robustness against RH attacks with overhead reduction.
Innovation Solution
The proposed solution involves a memory device with a defense circuit that switches among multiple defense types based on predetermined operation times. This circuit determines the operation times for each defense type to effectively defend against different attack command sequences without increasing overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If target row refresh (TRR) is used to defend against row-hammering attacks, then robustness against RH attack is improved, but overhead increases
Solution Approach 1:
The patent implements dynamic switching between multiple defense types (e.g., TRR, random refresh, pseudo-random refresh) based on detected attack patterns and timing. The defense circuit monitors attack characteristics and adapts the refresh strategy in real-time, transitioning from static single-mode defense to dynamic multi-mode defense, thereby improving robustness without permanently increasing overhead.
Solution Approach 2:
The patent changes operational parameters of the refresh operation based on detected attack patterns. Different defense types employ different refresh intervals, target row selections, and refresh frequencies. By dynamically adjusting these parameters according to the detected attack command sequence, the system achieves adaptive defense that improves security without constant overhead.
2Reliability
If multiple defense types are implemented to defend against different attack command sequences, then robustness against RH attack is improved, but device complexity increases
Solution Approach 1:
The patent designs a universal defense circuit that can execute multiple defense types through a single integrated architecture. Rather than implementing separate dedicated circuits for each defense type, the system uses one multi-functional defense circuit that can switch between TRR, random refresh, pseudo-random refresh, and other defense strategies, thereby reducing overall device complexity while maintaining robustness.
Solution Approach 2:
The defense circuit incorporates automatic detection and selection capabilities that reduce the need for external control logic. The circuit autonomously monitors attack patterns, determines the appropriate defense type, and switches modes without requiring complex external coordination, thereby simplifying the overall system architecture while maintaining multiple defense capabilities.
3Object-affected harmful factors
If round-robin attack method is used to avoid defense logic, then attack effectiveness is improved, but single defense type becomes vulnerable
Solution Approach 1:
The patent implements periodic switching between different defense types to counter round-robin attacks. By cycling through multiple defense strategies at predetermined intervals or based on attack detection, the system ensures that no single attack pattern can consistently exploit a static defense, thereby maintaining defense performance against adaptive attacks.
Data Source
AI summary
A defense method of a memory device according to an embodiment includes obtaining a plurality of defense types to refresh a row of a memory cell array that is subjected to an attack, determining respective operation times for the defense types, and performing a refresh operation for the row of the memory cell array by switching among the defense types based on the respective operation times that were determined.