Forward Path Delay Calibration for Memory Command Timing
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Solution Overview
Problem
In semiconductor memory, the high frequency of memory clock signals and multi-data rate operations complicate the timing of internal command and clock signals, leading to potential misalignment and incorrect data transfer due to varying propagation delays caused by power, voltage, and temperature conditions, resulting in improper memory operation.
Innovation Solution
The implementation of a signal path with an adjustable delay circuit and a forward path measurement circuit to synchronize command and clock signals, using a delay-locked loop and shift circuits to ensure correct timing by measuring and adjusting the propagation delay to satisfy latency requirements, thereby maintaining proper timing across different operating conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the propagation delay of clock and command paths is modeled to be the same, then timing synchronization is simplified, but delays and counter circuitry must run continuously causing higher power consumption
Solution Approach 1:
The patent implements periodic measurement of forward path delay instead of continuous operation. The forward path delay is measured at specific intervals (e.g., during calibration phases or when operating conditions change), allowing the system to maintain accurate timing information while significantly reducing power consumption compared to continuous measurement approaches.
Solution Approach 2:
The system uses its own internal resources (clock signals already present in the memory device) to perform the forward path delay measurement, eliminating the need for external measurement equipment. The measurement is performed using existing circuitry within the memory device itself, making the system self-sufficient for timing calibration.
2Measurement precision
If delays and counter circuitry run continuously to maintain timing synchronization, then timing accuracy is maintained, but power consumption increases
Solution Approach 1:
The system performs forward path delay measurements periodically rather than continuously, maintaining timing accuracy by updating delay values at appropriate intervals while reducing power consumption by keeping measurement circuitry inactive between measurements.
Solution Approach 2:
The system uses feedback from the measured forward path delay to adjust command signal timing dynamically. The measured delay information is fed back to the command timing control circuitry, which adjusts command issuance timing to compensate for variations in forward path delay, thereby maintaining accurate timing without continuous measurement.
3Loss of time
If additional delay circuitry is added to compensate for long propagation delay, then timing can be adjusted, but variations due to operating conditions negatively affect timing
Solution Approach 1:
The system dynamically adjusts command timing based on measured forward path delay values. Rather than using fixed delay circuitry, the system modifies command issuance timing in real-time based on actual measured conditions, allowing it to adapt to variations in operating conditions such as temperature and voltage changes.
Solution Approach 2:
The system changes the timing parameters of command signals based on measured forward path delay characteristics. By adjusting command timing parameters dynamically according to measured conditions, the system compensates for variations in propagation delay caused by changing operating conditions, maintaining reliable timing across different environments.
Data Source
AI summary
Apparatuses and methods related to altering the timing of command signals for executing commands is disclosed. One such method includes calculating a forward path delay of a clock circuit in terms of a number of clock cycles of an output clock signal provided by the clock circuit and adding a number of additional clock cycles of delay to a forward path delay of a signal path. The forward path delay of the clock circuit is representative of the forward path delay of the signal path and the number of additional clock cycles is based at least in part on the number of clock cycles of forward path delay.