Memory Programming Delay Control for Program Disturb Mitigation
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Solution Overview
Problem
Memory cells in a memory sub-system are susceptible to program disturb due to manufacturing defects and variability, leading to inconsistent reliability and reduced read window budget, which affects programming efficiency and performance.
Innovation Solution
A programming delay scheme is implemented based on memory cell reliability, incorporating a multi-pass programming sequence with a controlled delay between first and second passes to mitigate program disturb and enhance reliability, particularly for cells with lower reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two-pass programming operation is used, then programming reliability is improved, but programming time increases
Solution Approach 1:
The patent applies dynamics by making the delay duration between first and second pass programming operations variable rather than fixed. The delay is dynamically adjusted based on measured memory cell reliability metrics, allowing the system to optimize between speed and reliability for different cell conditions. This resolves the contradiction by adapting the programming time investment to the actual need of each memory cell.
Solution Approach 2:
The patent changes the parameter of delay duration based on reliability measurements. By measuring reliability metrics (such as read window budget) and adjusting the delay parameter accordingly, the system optimizes programming time while ensuring adequate settling time for unreliable cells. This parameter adaptation resolves the contradiction between speed and reliability.
2Reliability
If delay is introduced between first and second pass programming, then program disturb is reduced, but programming latency increases
Solution Approach 1:
The patent applies local quality by introducing delays selectively based on individual memory cell reliability characteristics rather than applying a uniform delay to all cells. Cells with poor reliability metrics receive longer delays, while reliable cells receive minimal or no delays. This localized approach reduces program disturb where needed while minimizing overall programming latency.
Solution Approach 2:
The delay duration is dynamically determined based on measured reliability metrics for each memory cell or group of cells. This dynamic adjustment allows the system to apply the minimum necessary delay to achieve program disturb reduction, optimizing the balance between reliability improvement and latency minimization.
3Reliability
If programming delay is applied to low reliability memory cells, then read window budget is increased, but overall programming speed decreases
Solution Approach 1:
The patent applies different delay treatments to different memory cells based on their reliability characteristics. Low reliability cells receive extended delays to increase read window budget, while high reliability cells are programmed with minimal delay. This selective approach increases read window budget for problematic cells without significantly impacting overall programming speed.
Solution Approach 2:
The patent applies delay action partially - only to the extent necessary for low reliability cells rather than uniformly to all cells. This partial application of delay achieves the necessary read window budget improvement for unreliable cells while avoiding excessive delays that would reduce overall programming speed.
Data Source
AI summary
A system includes a memory device and a processing device operatively coupled to the memory device. The processing device is to receive a programming command with respect to a set of memory cells. The processing device is further to determine a delay based on a difference between reliability of a subset of the set of memory cells and a predetermined memory reliability threshold. The processing device is further to perform a programming operation with respect to the subset. The programming operation includes the delay.