Semiconductor Memory Device Charge Storage Film Positioning

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in improving write characteristics due to the configuration of memory pillars and charge storage films, leading to degradation in threshold voltage gradients and write operations.

Innovation Solution

The semiconductor memory device incorporates a memory pillar configuration where a part of the charge storage film is positioned between the memory trench and conductive layers, increasing charge storage and threshold voltage, thereby enhancing write characteristics by preventing parasitic transistor activation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the charge storage film is positioned within the memory pillar only, then the memory cell structure is compact, but the write characteristics degrade due to insufficient charge storage and lower threshold voltage gradient

Engineering Contradiction:
Improvewrite characteristicsVSAvoidmemory pillar configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The charge storage film is extended from the traditional vertical position within the memory pillar to a horizontal position between the memory trench and the conductive layer. This dimensional change allows the charge storage film to utilize the lateral space in the memory cell structure, increasing the effective charge storage area without increasing the vertical height of the memory pillar, thereby improving write characteristics while maintaining structural compactness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The charge storage film positioned between the memory trench and the conductive layer acts as an intermediary structure that enhances the electric field distribution during write operations. This intermediate charge storage region provides additional charge accumulation capability, improving the threshold voltage gradient and write characteristics without requiring fundamental changes to the existing memory cell architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the charge storage film area is increased to improve charge storage, then write characteristics improve, but the memory cell area increases

Engineering Contradiction:
Improvecharge storage capabilityVSAvoidmemory cell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of increasing the charge storage film area in the vertical direction which would increase memory cell height and area, the invention extends the charge storage film laterally between the memory trench and conductive layer. This utilizes the horizontal space within the existing memory cell footprint, increasing charge storage capability without proportionally increasing the overall memory cell area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The charge storage film is strategically positioned in the specific region between the memory trench and conductive layer where it can most effectively influence the electric field distribution during write operations. This localized placement optimizes the charge storage function in the critical region without requiring uniform expansion of the charge storage film throughout the entire memory cell structure.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10872902B2Semiconductor memory device
Publication Date: 2020.12.22 KIOXIA CORP
  • US10872902B2 patent drawing
  • US10872902B2 patent drawing
  • US10872902B2 patent drawing

AI summary

According to one embodiment, first and second conductive layers are stacked in a first direction. The second conductive layers are spaced from the first conductive layers. Insulation regions are provided between the first and second conductive layers. A pillar is arranged between the first and second conductive layers and between the insulation regions. The pillar includes a charge storage film, a first insulation film, and a semiconductor layer, which are provided sequentially from the first conductive layers. A second insulation film is provided between the charge storage film and the first conductive layers. A portion of the charge storage film is provided between one of the insulation regions and the first conductive layers at an end of a portion where the first conductive layers and the pillar face each other.